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RT6056 Datasheet(PDF) 24 Page - Richtek Technology Corporation

Part # RT6056
Description  High-Side or Low-Side Measurement, Bi-Directional Current and Power Monitor with 16-Bit ADC Op Amp/Alert
PDF  27 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT6056 Datasheet(HTML) 24 Page - Richtek Technology Corporation

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RT6056
Copyright © 2022 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation
www.richtek.com
DS6056-00
April 2022
24
⚫
Gain Error, GE%
⚫
PSRR of offset voltage, PSRR
⚫
Common mode rejection, CMRR
⚫
The offset voltage caused by input bias current
⚫
Nonlinearity Error, NLIN%
Max Output Error Estimation
This section gives an example. The system bus voltage
for IN+ = 36V, supply voltage VS = 5V, shunt resistor is
accuracy 1% 2m
, the load current is 25A. To set the
design goals, the maximum output voltage errors are
calculated as follows:
Input offset voltage error
The rate of offset error in the total error can be estimated
directly from the specification table. The input offset
voltage is 10
V at TA = 25C, the error due to offset can
be obtained by the equation below :
OS(MAX)
OS_err
SENSE
V
10
μV
V
=
100% =
100% = 0.02%
V
2m
25A


Sense Voltage Gain Error
From the electrical characteristics, the max gain error is
1%.
PSRR Error
The PSRR error is to estimate the error caused by
different
supply
voltage;
the
RT6056
device
specification gives the specified power supply voltage
for the input offset voltage specification as VS = 3.3V;
when the system supply voltage is not exactly 3.3V, it
may result in an additional error. RT6056 device gives
the maximum PSRR as 2.5
V/V. Calculate the PSRR
error by the equation below :
S_DS
S_SYS
SENSE
V
V
PSRR
PSRR_err =
100%
V
μV
3.3 5 2.5
V
=
100% = 0.0085%
2m
25A
−
−

CMRR Error
The CMRR error means the input offset error is
influenced by the variation of common-mode voltage; in
real conditions, calculate the maximum input offset by
determining the actual common-mode voltage as
applied to RT6056. According to the RT6056 device
specification, it gives the common-mode rejection ratio
minimum as 126dB (0.501
V/V). The offset voltage in
the data sheet is specified with a common-mode voltage
that is 12V. To calculate the actual common-mode error
at system bus voltage :
(
)
6
126dB
20
μV
μV
1
126dB =
10
= 0.501
VV
10

CM_DS
CM_SYS
SENSE
V
V
CMRR
CMRR_err =
100%
V
μV
12 36 0.501
V
=
100% = 0.024%
2m
25A
−
−

Input Bias Current Error
The input bias current flows into shunt resistor to cause
additional offset; this error is calculated with respect to
the ideal voltage across the sense voltage.
B
SHUNT
B_err
SENSE
35
μA 2m
IR
I
=
100% =
100% = 0.0001%
V
2m
25A



Nonlinearity Error
For ideal cases, the voltage gain is constant over full
sense ranges, but in the real application, the voltage
gain is not exactly constant, the nonlinearity gain may
cause some additional errors. In the specification, the
RT6056 gives the nonlinearity error as 0.1% over sense
voltage from 20mV to 80mV.



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