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SST55LD019C Datasheet(PDF) 12 Page - Silicon Storage Technology, Inc |
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SST55LD019C Datasheet(HTML) 12 Page - Silicon Storage Technology, Inc |
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12 / 79 page ![]() 12 Data Sheet ATA Flash Disk Controller SST55LD019A / SST55LD019B / SST55LD019C ©2006 Silicon Storage Technology, Inc. S71241-04-000 12/06 Serial Communication Interface (SCI) SCIDOUT 79 J2 A9 O O4 SCI interface data output SCIDIN 78 K2 C8 I I3U SCI interface data input SCICLK 77 K1 C9 I I3U SCI interface clock External Clock Option FCE7#/ INTCLKEN 26 C9 J1 I/O I3D/O4 Active Low Flash Media Chip Enable pin This pin is sensed during the Power-on Reset (POR) to select an Internal Clock mode. If this pin is pulled up during the Power-on Reset then the Internal Clock is selected. EXTCLKIN 100 J8 B3 I I4Z External Clock source input pin EXTCLKOUT 99 K9 A3 O O4 External Clock source output pin Miscellaneous VSS (IO) 2 12 27 36 64 74 90 98 A2 A6 A10 D4 E1 E10 H1 J10 K5 K8 D7, G4 PWR Ground for I/O VSS (Core) 25 51 A1 B10 G7 PWR Ground for Core VDD (IO) 38 87 B6 K4 K4 PWR VDD (3.3V) VDD (Core) 76 J1 B9 PWR VDD (3.3V) VDDQ (IO) 7 69 F1 G10 B1 PWR VDDQ (5V/3.3V) for Host interface POR# 50 B3 H7 I Analog Input2 Power-on Reset (POR). Active Low TIE_DN 13 D1 Pins need to be connected to VSS. TABLE 3-1: Pin Assignments (Continued) (3 of 4) Symbol Pin No. Pin Type I/O Type1 Name and Functions 100-TQFP 85- VFBGA 84- TFBGA |
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