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ES9080 Datasheet(PDF) 110 Page - ESS Technology,Inc |
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ES9080 Datasheet(HTML) 110 Page - ESS Technology,Inc |
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110 / 146 page ![]() CONFIDENTIAL ADVANCE INFORMATION 0.4.3 ES9080 Product Datasheet ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 110 Synchronous Slave Interface (no clock required) Register 192: RESET & PLL REGISTER1 Bits [7] [6] [5:3] [2] [1] [0] Default 1'b0 1'b0 3'd0 1'b0 1'b0 1'b0 Bits Mnemonic Description [7] AO_SOFT_RESET Performs soft reset to clocked registers. • 1’b0: Disabled (default) • 1’b1: Enabled [6] PLL_SOFT_RESET Performs soft reset to clock not required registers. • 1’b0: Disabled (default) • 1’b1: Enabled [5:3] RESERVED NA [2] I2C_ADDR This bit configures the I2C device address for 1 of 2 devices • 1'b0: I2C device address 0x90/0x98 (default) • 1'b1: I2C device address 0x92/0x9A See Register Overview for more information [1] GPIO1_SDB_AO Configures GPIO1 SDB (Shutdown_b) When SYS_CLK is provided through GPIO1, set this bit to ‘1’ to allow SYS_CLK input. • 1’b0: Disabled (default) • 1’b1: Enabled [0] PLL_CLKHV_PHASE_INV Inverts SYS_CLK. • 1’b0: Disabled (default) • 1’b1: Enabled |
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