 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ES9080 Datasheet(PDF) 111 Page - ESS Technology,Inc |
|
|
|||||||||||||||||||||||||||||
ES9080 Datasheet(HTML) 111 Page - ESS Technology,Inc |
|
|
111 / 146 page  CONFIDENTIAL ADVANCE INFORMATION 0.4.3 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 111 ES9080 Product Datasheet Register 193: PLL REGISTER2 Bits [7] [6] [5] [4:3] [2:1] [0] Default 1'b0 1'b0 1'b0 2'd0 2'd0 1'b0 Bits Mnemonic Description [7] PLL_BYP PLL bypass mode. • 1’b0: Disabled (default) • 1’b1: Enabled [6] DVDD_SHUNTB Enables digital regulator output shunt to ground (10k). Active low. • 1’b0: Enabled (default) • 1’b1: Disabled [5] SEL_1V_DREG Sets digital regulator output voltage to 1V • 1’b0: Disabled (default) • 1’b1: Enabled [4:3] PLL_HVREG_VREF_SEL PLL HVREG reference voltage selection • 2'b11: 1.7 V (Optimum setting, normal operation) • Others: reserved [2:1] SEL_PLL_IN Selects PLL input clock sources. • 2'd0: XTAL (default) • 2'd1: MCLK • 2'd2: XIN • 2'd3: BCK [0] EN_PLL_CLKIN PLL input clocks control. • 1'b0: Disables PLL input clocks (default) • 1'b1: Enables PLL input clocks |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
