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ES9080 Datasheet(PDF) 113 Page - ESS Technology,Inc |
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ES9080 Datasheet(HTML) 113 Page - ESS Technology,Inc |
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113 / 146 page  CONFIDENTIAL ADVANCE INFORMATION 0.4.3 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 113 ES9080 Product Datasheet Register 196: PLL REGISTER5 Bits [7:5] [4:2] [1:0] Default 3'd0 3'd0 2'd0 Bits Mnemonic Description [7:5] PLL_VCO_BAND_CTRL Selects the frequency band of the VCO. • 3’d0: Minimum (default) • 3’d10: Optimum analog performance • 3’d7: Maximum [4:2] RESERVED NA [1:0] PLL_VCO_BIAS Selects the bias current of the VCO. • 2’b00: Minimum (default) • 2’b11: Maximum, Optimum analog performance Register 199-197: PLL REGISTER6 Bits [23:0] Default 24'd0 Bits Mnemonic Description [23:0] PLL_CLK_FB_DIV Sets the PLL clock feedback divider. • 20’d0: Reserved • 20'dn: Divide by (2^25)/n |
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