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TLK1221 Datasheet(PDF) 5 Page - Texas Instruments |
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TLK1221 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 23 page ![]() www.ti.com DXX.X K28.5 DXX.X DXX.X K28.5 K28.5 DXX.X DXX.X DXX.X DXX.X DXX.X K28.5 DXX.X DXX.X K28.5 K28.5 DXX.X DXX.X 31Bit Times MaxReceive PathLatency WorstCase MisalignedK28.5 MisalignmentCorrected INPUTDATA RBC0 RBC1 RD(0–9) SYNC CorruptData 30Bit Times(Max) Data Reception Latency 10-BitCode RXP,RXN RD(0–9) RBC0 10-BitCode td(Rx latency) RBC1 Testability TLK1221 SLLS713 – FEBRUARY 2007 Figure 4. Word Realignment Timing Characteristic Waveforms Systems that do not require framed data may disable byte alignment by tying SYNCEN low. When a SYNC character is detected, the SYNC signal is brought high and is aligned with the K28.5 character. The duration of the SYNC pulse is equal to the duration of the data. The serial-to-parallel data latency is the time from when the first bit arrives at the receiver until it is output in the aligned parallel word with RD0 received as the first bit. The minimum latency in TBI mode is 21 bit times and the maximum latency is 31 bit times. Figure 5. Receiver Latency, TBI Half-Rate Mode Shown The loopback function provides for at-speed testing of the transmit/receive section of the circuitry. The enable function allows for all circuitry to be disabled so that an Iddq test can be performed. The PRBS function also allows for built-in self-test (BIST). 5 Submit Documentation Feedback |
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