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ABSOLUTE MAXIMUM RATINGS

DISSIPATION RATINGS

TLK1221

SLLS713 – FEBRUARY 2007

Table 2. TERMINAL FUNCTIONS (continued)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

Synchronous function enable. When SYNCEN is high, the internal synchronization function

I

is activated. When this function is activated, the transceiver detects the comma pattern

SYNCEN

32

(0011 111 negative beginning disparity) in the serial data stream and realigns data on byte

boundaries if required. When SYNCEN is low, serial input data is unframed in RD0–RD9.

Synchronous detect. The SYNC output is asserted high upon detection of the comma

pattern in the serial data path. SYNC pulses are output only when SYNCEN is activated

SYNC/PASS

30

O

(asserted high). In PRBS test mode (PRBSEN = high), SYNC/PASS outputs the status of

the PRBS test results (high = pass).

TEST

Loop enable. When LOOPEN is high (active), the internal loopback path is activated. The

transmitted serial data is directly routed to the inputs of the receiver. This provides a self-test

I

LOOPEN

15

capability in conjunction with the protocol device. The TXP and TXN outputs are held in a

high-impedance state during the loopback test. LOOPEN is held low during standard

operational state with external serial outputs and inputs active.

PRBS enable. When PRBSEN is high, the PRBS generation circuitry is enabled. The PRBS

I

verification circuit in the receive side is also enabled. A PRBS signal can be fed to the

PRBSEN

31

receive inputs and checked for errors, which are reported by the SYNC/PASS terminal

indicating low.

When this terminal is low, the device is disabled for Iddq testing. RD0–RD9, RBCn, TXP and

I

ENABLE

1

TXN are high-impedance. The pullup and pulldown resistors on any input are disabled.

When ENABLE is high, the device operates normally.

POWER

VDD

6, 16, 26

Supply

Digital logic power. Provides power for all digital circuitry and digital I/O buffers

Analog power. VDDA provides power for the high-speed analog circuits, receiver, and

VDDA

37

Supply

transmitter.

VDDPLL

36

Supply

PLL power. Provides power for the PLL circuitry. This terminal requires additional filtering.

GROUND

GNDA

35, 40

Ground

Analog ground. GNDA provides a ground for the high-speed analog circuits, RX and TX.

GNDQFN

PAD

Ground

Digital logic ground. Provides a ground for the logic circuits and digital I/O buffers

(2)

P/U = Internal pullup resistor

(3)

P/D = Internal pulldown resistor

over operating free-air temperature range (unless otherwise noted)

UNIT

–0.3 to 3

V

Input voltage range at TTL terminals

–0.5 to 4

V

Input voltage range at other terminals

V

ESD

Electrostatic discharge

CDM: 1, HBM: 2

kV

Storage temperature

–65 to 150

°C

Characterized free-air temperature range

–40 to 85

°C

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.

DERATING FACTOR

PACKAGE

POWER RATING

POWER RATING

POWER RATING

2.85 W

28 mW/

°C

1.57 W

1.4 W

(1)

The thermal resistance junction to ambient of the RHA package is 35

°C/W measured on a high-K board.

(2)

The thermal resistance junction-to-case (exposed pad) of the RHA package is 5

°C/W.

7

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