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TLK1221 Datasheet(PDF) 9 Page - Texas Instruments

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Part # TLK1221
Description  ETHERNET TRANSCEIVER
PDF  23 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLK1221 Datasheet(HTML) 9 Page - Texas Instruments

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TRANSMITTER/RECEIVER CHARACTERISTICS
80%
50%
20%
t
r
t
r
t
f
t
f
80%
50%
20%
~ V
~ V
~ V
~ V
80%
20%
0V
~ 1V
~ –1V
TX+
TX–
VOD
RXP,RXN
RD(0–9)
RBC0
10-BitCode
td(Rx latency)
10-BitCode
b0
b1
b2
b3
b4
b5
b6
b7
b8
b9
TLK1221
SLLS713 – FEBRUARY 2007
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOD = |TxD – TxN|
Rt = 50
Ω
600
850
1100
mV
Transmit common mode voltage
V(CM)
Rt = 50
Ω
1000
1250
1400
mV
range
Receiver input voltage requirement,
200
1600
mV
VID = |RxP – RxN|
Receiver common mode voltage
1000
1250
2250
mV
range, (RxP + RxN)/2
CI
Receiver input capacitance
2
pF
Differential output jitter, random +
t(TJ)
Serial data total jitter (peak-to-peak)
deterministic, PRBS pattern,
0.24
UI
Rω = 125 MHz
Serial data deterministic jitter
Differential output jitter, PRBS
t(DJ)
0.12
UI
(peak-to-peak)
pattern, Rω = 125 MHz
Differential signal rise, fall time (20% RL = 50 Ω, CL = 5 pF, see Figure 6
tr, tf
100
250
ps
to 80%)
and Figure 8
Serial data jitter tolerance minimum
Differential input jitter, random +
required eye opening, (per
0.25
UI
deterministic, Rω = 125 MHz
IEEE-802.3 specification)
Receiver data acquisition lock time
500
µs
from power up
Data relock time from loss of
1024
Bit times
synchronization
td(Tx latency) Tx latency
See Figure 1
20
22
UI
td(Rx latency) Rx latency
See Figure 5 and Figure 7
18
24
UI
Figure 6. Differential and Common-Mode Output Voltage Definitions
Figure 7. Receiver Latency, TBI Normal Mode Shown
9
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