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ADC32RF52 Datasheet(PDF) 45 Page - Texas Instruments

Part # ADC32RF52
Description  ADC32RF52 Dual Channel 14-bit 1.5-GSPS RF Sampling Data Converter
PDF  108 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADC32RF52 Datasheet(HTML) 45 Page - Texas Instruments

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The NCO phase accumulators can be reset using the external SYSREF signal. A SYSREF mask can be setup
such the SYSREF signal only goes to the NCO and the remaining device remains unaffected. The following
register writes configure the SYSREF mask to only affect the NCO. After completion the SYSREF mask should
be set back to default.
Table 7-26. Example Register Writes to configure the SYSREF MASK
ADDR
DATA
DESCRIPTION
0x05
0x18
Select DDCAB/CD page
0x181
0x40
Reset NCO phases with SYSREF toggle
0x05
0x02
Select Digital Page
0x357
0xA2
SYSREF mask settings (0x00 is mask default)
0x358
0x02
SYSREF mask settings (0x00 is mask default)
7.3.5.7 Fast Frequency Hopping
The ADC32RF52 supports several different options to update the NCO frequencies. Fast frequency hopping can
be achieved in one of the following ways:
• Using the GPIO1/2 pins to select the NCO frequency
• Using the GPIO1/2, SPISEL and SCLK/SDIO pins to select the NCO frequency
• Using the GPIO1/2 pins to program the NCO frequency selection (Fast SPI)
NCO CONTROL
SCLK
SDATA
SPISEL
GPIO1
GPIO2
NCO SEL
MODE
Regular SPI (default)
SPI Interface
0
used for other purpose
00
GPIO1/2
SPI Interface
0
used for NCO control
00
GPIO1/2, SPISEL, SCLK/SDATA
NCO CONTROL
1
used for NCO control
00
FAST SPI
SPI Interface
1
SDATA
SCLK
10
The internal NCO is switched very quickly however the switching time depends primarily on the time it takes to
flush out the decimation filter as shown in Table 7-27.
Table 7-27. NCO switching time (FS = 1.5 GSPS) vs decimation setting
Decimation Setting
NCO Switching Time
/4
~ 500 ns
/8
~ 700 ns
/16
~ 1.2 us
/32
~ 2 us
/64
~ 4 us
/128
~ 8 us
7.3.5.7.1 Fast frequency hopping using the GPIO1/2 pins
The NCO frequency is selected as shown in Table 7-28. This mode is enabled with the following register writes:
1. Set 0x234 to 0x03 (NCO SEL MODE = 0, GPIO MODE = 3)
Table 7-28. NCO Frequency Selection using GPIO1/2 Pins
# OF BANDS
GPIO2
GPIO1
GPIO2
GPIO1
GPIO2
GPIO1
GPIO2
GPIO1
SINGLE
0
0
0
0
0
0
NCO1 CHA [1:0]
0
0
0
0
0
0
NCO1 CHB [1:0]
DUAL
0
0
0
0
NCO2 CHA [1:0]
NCO1 CHA [1:0]
0
0
0
0
NCO2 CHB [1:0]
NCO1 CHB [1:0]
QUAD
NCO4 CHA [1:0]
NCO3 CHA [1:0]
NCO2 CHA [1:0]
NCO1 CHA [1:0]
NCO4 CHB [1:0]
NCO3 CHB [1:0]
NCO2 CHB [1:0]
NCO1 CHB [1:0]
www.ti.com
ADC32RF52
SBASAI6 – SEPTEMBER 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: ADC32RF52



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