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TMUX121 Datasheet(PDF) 9 Page - Texas Instruments

Part # TMUX121
Description  TMUX121 Low-Capacitance, 2-Channel, 2:1 Switch with Power-Off Isolation and 1.8-V Logic
PDF  18 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMUX121 Datasheet(HTML) 9 Page - Texas Instruments

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8.2.1.1 Design Requirements
Table 8-1. TMUX121 I3C Compatibility
I3C Requirements
TMUX121 Specification
Voltage
1.0 V, 1.2 V, 1.8 V, 3.3 V
0-3.6 V
Frequency
Up to 12.5 MHz
3 GHz Bandwidth
Capacitance
50 pF maximum bus capacitance
< 2 pF On or Off Capacitance
8.2.1.2 Detailed Design Procedure
The TMUX121 supports I3C standard by maintaining signal integrity through the switch. Table 8-1 details how
the TMUX121 specifications make this device optimal for switching I3C signals. Choosing a multiplexer with
very low capacitance helps reduces the impact to your total capacitance budget. This can enable more design
flexibility keeping the total bus capacitance under 50 pF such as: longer traces, more ICs, multiple buses, and so
forth.
8.2.1.3 Application Curves
Figure 8-2 shows bandwidth of the TMUX121. This can easily support the max data rate of the I3C standard. A
combination of low on-resistance, low capacitance, and low added jitter from the device allows it to be used for
I3C.
Frequency(Hz)
-6
-5
-4
-3
-2
-1
0
1M
10M
100M
1G
Figure 8-2. Typical Differential Bandwidth vs Frequency
8.3 Power Supply Recommendations
The TMUX121 does not require a power supply sequence. However, TI recommends to enable the device after
VDD is stable and in specification. TI also recommends placing a bypass capacitor as close to the supply pin
VDD as possible to help smooth out lower frequency noise to provide better load regulation across the frequency
spectrum.
8.4 Layout
8.4.1 Layout Guidelines
Place supply bypass capacitors as close to VDD pin as possible and avoid placing the bypass capacitors near
the high speed traces.
Route the high-speed signals using a minimum of vias and corners which reduces signal reflections and
impedance changes. When a via must be used, increase the clearance size around it to minimize its
capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of
picking up interference from the other layers of the board. Be careful when designing test points on twisted pair
lines; through-hole pins are not recommended.
www.ti.com
TMUX121
SCDS381 – AUGUST 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: TMUX121



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