ATMEGA48 datasheet(64/374 Pages) ATMEL

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2545J–AVR–12/06

ATmega48/88/168

Address

Labels Code

Comments

;

.org 0x1C00

0x1C00

jmp

RESET

; Reset handler

0x1C02

jmp

EXT_INT0

; IRQ0 Handler

0x1C04

jmp

EXT_INT1

; IRQ1 Handler

...

;

0x1C32

jmp

SPM_RDY

; Store Program Memory Ready Handler

;

0x1C33

RESET: ldi

r16,high(RAMEND); Main program start

0x1C34

out

SPH,r16

; Set Stack Pointer to top of RAM

0x1C35

ldi

r16,low(RAMEND)

0x1C36

out

SPL,r16

0x1C37

sei

; Enable interrupts

0x1C38

<instr>

xxx

10.4.1

Moving Interrupts Between Application and Boot Space, ATmega88 and ATmega168

The MCU Control Register controls the placement of the Interrupt Vector table.

10.5

10.5.1

MCUCR – MCU Control Register

• Bit 1 – IVSEL: Interrupt Vector Select

When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash

memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot

Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-

mined by the BOOTSZ Fuses. Refer to the section ”Boot Loader Support – Read-While-Write

Self-Programming, ATmega88 and ATmega168” on page 269 for details. To avoid unintentional

changes of Interrupt Vector tables, a special write procedure must be followed to change the

IVSEL bit:

Write the Interrupt Vector Change Enable (IVCE) bit to one.

Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.

Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled

in the cycle IVCE is set, and they remain disabled until after the instruction following the write to

IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status

Note:

If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,

interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed

in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while

executing from the Boot Loader section. Refer to the section ”Boot Loader Support – Read-While-

Write Self-Programming, ATmega88 and ATmega168” on page 269 for details on Boot Lock bits.

This bit is not available in ATmega48.

Bit

76543

210

0x35 (0x55)

–

PUD

–

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

00000

000

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