| Electronic Components Datasheet Search |
|
ATMEGA48 Datasheet(PDF) 43 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
ATMEGA48 Datasheet(HTML) 43 Page - ATMEL Corporation |
|
43 / 374 page ![]() 43 2545J–AVR–12/06 ATmega48/88/168 8.9 Register Description 8.9.1 SMCR – Sleep Mode Control Register The Sleep Mode Control Register contains control bits for power management. • Bits 7..4 Res: Reserved Bits These bits are unused bits in the ATmega48/88/168, and will always read as zero. • Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0 These bits select between the five available sleep modes as shown in Table 8-2. Note: 1. Standby mode is only recommended for use with external crystals or resonators. • Bit 0 – SE: Sleep Enable The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of the SLEEP instruction and to clear it immediately after waking up. Bit 7 654 32 10 0x33 (0x53) – – – – SM2 SM1 SM0 SE SMCR Read/Write R R R R R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Table 8-2. Sleep Mode Select SM2 SM1 SM0 Sleep Mode 00 0 Idle 0 0 1 ADC Noise Reduction 0 1 0 Power-down 0 1 1 Power-save 10 0 Reserved 10 1 Reserved 1 1 0 Standby(1) 11 1 Reserved |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |