ATMEGA3290 datasheet(35/375 Pages) ATMEL

35 / 375 page

ATmega329/3290/649/6490

2552H–AVR–11/06

The LCD controller and Timer/Counter2 can be clocked both synchronously and asyn-

chronously in Power-save mode. The clock source for the two modules can be selected

independent of each other. If neither the LCD controller nor the Timer/Counter2 is using

the asynchronous clock, the Timer/Counter Oscillator is stopped during sleep. If neither

the LCD controller nor the Timer/Counter2 is using the synchronous clock, the clock

source is stopped during sleep. Note that even if the synchronous clock is running in

Power-save, this clock is only available for the LCD controller and Timer/Counter2.

Standby Mode

When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,

the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to

Power-down with the exception that the Oscillator is kept running. From Standby mode,

the device wakes up in six clock cycles.

Power Reduction

The Power Reduction Register (PRR), see “PRR – Power Reduction Register” on page

38, provides a method to stop the clock to individual peripherals to reduce power con-

sumption. The current state of the peripheral is frozen and the I/O registers inaccessible.

Resources used by the peripheral when stopping the clock will remain occupied so the

peripheral should be disabled before stopping the clock. Waking up a module, which is

done by clearing the bit in PRR, puts the module in the same state as before shutdown.

Module shutdown can be used in IDLE mode and active mode to reduce the overall

power consumption. In all other sleep modes, the clock is already stopped.

ATMEGA3290 Datasheet(PDF) 35 Page - ATMEL Corporation