ATMEGA3290 datasheet(48/375 Pages) ATMEL

48 / 375 page

ATmega329/3290/649/6490

2552H–AVR–11/06

Timed Sequences for

Changing the

Configuration of the

Watchdog Timer

The sequence for changing configuration differs slightly between the two safety levels.

Separate procedures are described for each level.

Safety Level 1

In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the

WDE bit to 1 without any restriction. A timed sequence is needed when changing the

Watchdog Time-out period or disabling an enabled Watchdog Timer. To disable an

enabled Watchdog Timer, and/or changing the Watchdog Time-out, the following proce-

dure must be followed:

In the same operation, write a logic one to WDCE and WDE. A logic one must be

written to WDE regardless of the previous value of the WDE bit.

Within the next four clock cycles, in the same operation, write the WDE and WDP

bits as desired, but with the WDCE bit cleared.

Safety Level 2

In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read

as one. A timed sequence is needed when changing the Watchdog Time-out period. To

change the Watchdog Time-out, the following procedure must be followed:

In the same operation, write a logical one to WDCE and WDE. Even though the

WDE always is set, the WDE must be written to one to start the timed sequence.

Within the next four clock cycles, in the same operation, write the WDP bits as desired,

but with the WDCE bit cleared. The value written to the WDE bit is irrelevant.

ATMEGA3290 Datasheet(PDF) 48 Page - ATMEL Corporation