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ISP1581BD Datasheet(PDF) 13 Page - NXP Semiconductors |
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ISP1581BD Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 73 page ![]() Philips Semiconductors ISP1581 USB 2.0 HS interface device Objective specification Rev. 02 — 23 October 2000 13 of 73 9397 750 07648 © Philips Electronics N.V. 2000. All rights reserved. 9.1 Register access Register access depends on the bus width used: • 8-bit bus: multi-byte registers are accessed lower byte (LSB) first. • 16-bit bus: for single-byte registers the upper byte (MSB) must be ignored. Endpoint specific registers are indexed via the Endpoint Index register. The target endpoint must be selected first, before accessing the following registers: • Buffer Length • Control Function • Data Port • Endpoint MaxPacketsize • Endpoint Type • Short Packet. 9.2 Initialization registers 9.2.1 Address register (address: 00H) This register is used to set the USB assigned address and enable the USB device. Table 5 shows the Address register bit allocation. The DEVEN and DEVADDR bits will be cleared whenever a bus reset, a power-on reset or a soft reset occurs. In response to the standard USB request SET_ADDRESS, the firmware must write the (enabled) device address to the Address register, followed by sending an empty packet to the host. The new device address is activated when the host acknowledges the empty packet. Table 5: Address register: bit allocation Bit 7 6 5 4 3 2 1 0 Symbol DEVEN DEVADDR[6:0] Reset 0 00H Bus reset 0 00H Access R/W R/W Table 6: Endpoint Configuration register: bit description Bit Symbol Description 7 DEVEN A logic 1 enables the device. 6 to 0 DEVADDR[6:0] This field specifies the USB device address. |
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