AD9861 datasheet(1/52 Pages) AD

Part #	AD9861

Description	Mixed-Signal Front-End (MxFE?? Baseband Transceiver for Broadband Applications

PDF	52 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

Logo

1 / 52 page

Mixed-Signal Front-End (MxFE™) Baseband

Transceiver for Broadband Applications

AD9861

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

Fax: 781.326.8703

FEATURES

Receive path includes dual 10-bit analog-to-digital

converters with internal or external reference, 50 MSPS

and 80 MSPS versions

Transmit path includes dual 10-bit, 200 MSPS digital-to-

analog converters with 1×, 2×, or 4× interpolation and

programmable gain control

Internal clock distribution block includes a programmable

phase-locked loop and timing generation circuitry,

allowing single-reference clock operation

20-pin flexible I/O data interface allows various interleaved

or noninterleaved data transfers in half-duplex mode and

interleaved data transfers in full-duplex mode

Configurable through register programmability or

optionally limited programmability through mode pins

Independent Rx and Tx power-down control pins

64-lead LFCSP package (9 mm × 9 mm footprint)

3 configurable auxiliary converter pins

APPLICATIONS

Broadband access

Broadband LAN

Communications (modems)

FUNCTIONAL BLOCK DIAGRAM

DATA

MUX

AND

LATCH

DATA

LATCH

AND

DEMUX

I/O

INTERFACE

CONFIGURATION

BLOCK

AD9861

I/O

INTERFACE

CONTROL

FLEXIBLE

I/O BUS

[0:19]

Rx DATA

Tx DATA

ADC

VIN+A

VIN–A

ADC

VIN+B

VIN–B

LOW-PASS

INTERPOLATION

FILTER

DAC

IOUT+A

IOUT–A

DAC

IOUT+B

IOUT–B

AUX

ADC

AUX

DAC

AUX

DAC

AUX

DAC

AUX

ADC

CLKIN

ADC CLOCK

03606-0-001

DAC CLOCK

PLL

Figure 1.

GENERAL DESCRIPTION

The AD9861 is a member of the MxFE family—a group of

integrated converters for the communications market. The

AD9861 integrates dual 10-bit analog-to-digital converters

(ADC) and dual 10-bit digital-to-analog converters (TxDAC®).

Two speed grades are available, -50 and -80. The -50 is opti-

mized for ADC sampling of 50 MSPS and less, while the -80 is

optimized for ADC sample rates between 50 MSPS and 80 MSPS.

The dual TxDACs operate at speeds up to 200 MHz and

include a bypassable 2× or 4× interpolation filter. Three

auxiliary converters are also available to provide required

system level control voltages or to monitor system signals. The

AD9861 is optimized for high performance, low power, small

form factor, and to provide a cost-effective solution for the

broadband communication market.

The AD9861 uses a single input clock pin (CLKIN) to generate

all system clocks. The ADC and TxDAC clocks are generated

within a timing generation block that provides user programma-

ble options such as divide circuits, PLL multipliers, and switches.

A flexible, bidirectional 20-bit I/O bus accommodates a variety

of custom digital back ends or open market DSPs.

In half-duplex systems, the interface supports 20-bit parallel

transfers or 10-bit interleaved transfers. In full-duplex systems,

the interface supports an interleaved 10-bit ADC bus and an

interleaved 10-bit TxDAC bus. The flexible I/O bus reduces pin

count and, therefore, reduces the required package size on the

AD9861 and the device to which it connects.

The AD9861 can use either mode pins or a serial program-

mable interface (SPI) to configure the interface bus, operate the

ADC in a low power mode, configure the TxDAC interpolation

rate, and control ADC and TxDAC power-down. The SPI

provides more programmable options for both the TxDAC path

(for example, coarse and fine gain control and offset control for

channel matching) and the ADC path (for example, the internal

duty cycle stabilizer, and twos complement data format).

The AD9861 is packaged in a 64-lead LFCSP (low profile, fine

pitched, chip scale package). The 64-lead LFCSP footprint is

only 9 mm × 9 mm, and is less than 0.9 mm high, fitting into

tightly spaced applications such as PCMCIA cards

Similar Part No. - AD9861

Manufacturer	Part #	Datasheet	Description
Analog Devices	AD9861	1Mb / 52P	Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications REV. 0
	AD9861	977Kb / 52P	Transceiver for Broadband Applications 30-Jun-2017
	AD9861-50EB	1Mb / 52P	Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications REV. 0
	AD9861-80EB	1Mb / 52P	Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications REV. 0
	AD9861BCP-50	1Mb / 52P	Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications REV. 0

More results

Similar Description - AD9861

Manufacturer	Part #	Datasheet	Description
Analog Devices	AD9860	617Kb / 32P	Mixed-Signal Front-End (MxFE?? Processor for Broadband Communications REV.0
	AD9878	749Kb / 36P	Mixed-Signal Front End for Broadband Applications 3/05-Rev. 0 to Rev. A
	AD9863	997Kb / 40P	Mixed-Signal Front-End (MxFE?? Baseband Transceiver for Broadband Applications REV. A
	AD9862BSTZ	386Kb / 32P	Mixed-Signal Front-End (MxFE?? Processor for Broadband Communications REV. 0
	AD9863-50EBZ	997Kb / 40P	Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications REV. A
	AD9861BCPZ-50	1Mb / 52P	Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications REV. 0
	AD9861	1Mb / 52P	Mixed-Signal Front-End Baseband Transceiver for Broadband Applications REV. 0
	AD9863	997Kb / 40P	Mixed-Signal Front-End Baseband Transceiver for Broadband Applications REV. A
	AD9878	755Kb / 36P	Mixed-Signal Front End for Broadband Applications REV. A
	AD9993	2Mb / 56P	Integrated Mixed-Signal Front End (MxFE) REV. A

More results

AD9861 Datasheet(PDF) 1 Page - Analog Devices

AD9861 Datasheet(HTML) 1 Page - Analog Devices

Similar Part No. - AD9861

Similar Description - AD9861

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL