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MAX42410 Datasheet(PDF) 3 Page - Analog Devices |
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MAX42410 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 19 page ![]() MAX42408/MAX42410 36V, 8A/10A Fully Integrated Buck Converter with 10μA Quiescent Current and Dual-Phase Capability www.analog.com Analog Devices | 3 Absolute Maximum Ratings SUP, EN to PGND .............................................. -0.3V to +42V BST to LX........................................................... -0.3V to +2.2V BST to BIAS .......................................................... -0.3V to 42V BST to PGND...................................................... -0.3V to +44V LX to PGND ..............................................-0.3V to SUP + 0.3V SYNC, SYNCOUT, PGOOD to GND...................... -0.3V to 6V FB, VEA to GND ...................................... -0.3V to BIAS + 0.3V OUT to GND.......................................................... -0.3V to 16V PGND to GND...................................................... -0.3V to 0.3V BIAS to GND.......................................................-0.3V to +2.2V LX Continuous RMS Current ...............................................10A SUP Continuous RMS Current ..............................................5A ESD Protection Human Body Model .................................±2kV Continuous Power Dissipation (TA = +70°C, derate 37mW/°C above +70°C).............................................................. 2963mW Operating Junction Temperature.................... -40°C to +125°C Storage Temperature Range ......................... -65°C to +150°C Lead Temperature (Soldering 10s) ...............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information Package Code F173A3F+1F Outline Number 21-100699 Land Pattern Number 90-100239 THERMAL RESISTANCE, JEDEC BOARD Junction-to-Ambient (θJA) 38.6°C/W Junction-to-Case Thermal Resistance (θJC) 7.7°C/W THERMAL RESISTANCE, FOUR-LAYER EVALUATION KIT (EV KIT) BOARD Junction-to-Ambient (θJA) 27°C/W Junction-to-Case Thermal Resistance (θJC) 8.5°C/W For the latest package outline information and land patterns (footprints), go to https://www.analog.com/en/design- center/packaging-quality-symbols-footprints/package-index.html. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four- layer board. For detailed information on package thermal considerations, refer to https://www.analog.com/en/technical- articles/thermal-characterization-of-ic-packages.html. |
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