ADS5547 datasheet(17/57 Pages) TI

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DESCRIPTION OF SERIAL REGISTERS

ADS5527

SLWS196A – DECEMBER 2006 – REVISED MAY 2007

Each register function is explained in detail below.

Table 9. Serial Register A

A7 - A0 (hex)

OUTPUT DATA

POSITION

OUTPUT CLOCK POSITION PROGRAMMABILITY

PROGRAMMABILITY

D4 - D0

<CLKOUT POSN> Output clock position programmability

00001

Default CLKOUT position after reset. Setup/hold timings with this clock

position are specified in the timing characteristics table.

XX011

CMOS – Rising edge later by (1/12) Ts

LVDS – Rising edge earlier by (1/12) Ts

XX101

CMOS – Rising edge later by (3/12) Ts

LVDS – Rising edge aligned with data transition

XX111

CMOS – Rising edge later by (2/12) Ts

LVDS – Rising edge aligned with data transition

01XX1

CMOS – Rising edge later by (1/12) Ts

LVDS – Rising edge earlier by (1/12) Ts

10XX1

CMOS – Rising edge later by (3/12) Ts

LVDS – Rising edge aligned with data transition

11XX1

CMOS – Rising edge later by (2/12) Ts

LVDS – Rising edge aligned with data transition

D6 – D5

<DATA POSN> Output Switching Noise and Data Position

Programmability (in CMOS mode ONLY) (Only in CMOS mode)

Data Position 1 - Default output data position after reset. Setup/hold

timings with this data position are specified in the timing

characteristics table.

Data Position 2 - Setup time increases by (2/36) Ts

Data Position 3 - Setup time increases by (5/36) Ts

Data Position 4 - Setup time decreases by (6/36) Ts

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