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ADS5527

SLWS196A – DECEMBER 2006 – REVISED MAY 2007

PIN CONFIGURATION (CMOS MODE) (continued)

PIN ASSIGNMENTS – CMOS Mode (continued)

NUMBER

PIN NAME

DESCRIPTION

TYPE

NUMBER

OF PINS

This pin functions as serial interface data input when RESET is low. It functions as

STANDBY control pin when RESET is tied high.

SDATA

See Table 4 for detailed information.

The pin has an internal 100 k

Ω pull-down resistor.

This pin functions as serial interface enable input when RESET is low. It functions

as CLKOUT edge programmability when RESET is tied high. See Table 5 for

SEN

detailed information.

The pin has an internal 100-k

Ω pull-up resistor to DRVDD.

Output buffer enable input, active high. The pin has an internal 100-k

Ω pull-up

resistor to DRVDD.

Data Format Select input. This pin sets the DATA FORMAT (Twos complement or

DFS

Offset binary) and the LVDS/CMOS output mode type. See Table 6 for detailed

information.

Mode select input. This pin selects the internal or external reference mode. See

MODE

Table 7 for detailed information.

CLKOUT

CMOS output clock

CMOS output data D0

CMOS output data D1

CMOS output data D2

CMOS output data D3

CMOS output data D4

CMOS output data D5

CMOS output data D6

CMOS output data D7

CMOS output data D8

CMOS output data D9

D10

CMOS output data D10

D11

CMOS output data D11

OVR

Out-of-range indicator, CMOS level signal

DRVDD

Digital and output buffer supply

2, 35

DRGND

Digital and output buffer ground

1, 36

UNUSED

Unused pin in CMOS mode

31, 32, 33,

Do not connect

Connect the pad to the ground plane. See Board Design Considerations in

PAD

application information section.

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