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CDC706PW Datasheet(PDF) 15 Page - Texas Instruments |
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CDC706PW Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 41 page ![]() www.ti.com Default Device Setting PLL1 XO or 2LVCMOS or Differential Input MUX MUX DividerM 1 MUX DividerM 375 PLL3 PFD Filter VCO PLL2 w/SSC PFD Filter VCO DividerN 8 DividerN 250 DividerN 3136 SO/CLK_SEL S1 SCLOCK OutputSwitchMatrix 27MHz PROGRAMMING LOGIC SMBUS LOGIC PFD Filter VCO SDATA P0-Div 10 P1-Div 20 P2-Div 8 P3-Div 9 P4-Div 32 P5-Div 4 fVCO3 =225.792MHz CLK_IN0 CLK_IN1 27MHz Crystal SSC-OFF Y5 Y4 Y3 Y2 Y1 Y0 27MHz 27MHz 27MHz 27MHz LV CMOS LV CMOS LV CMOS LV CMOS LV CMOS LV CMOS 27MHz DividerM 27 fVCO1 =216MHz fVCO2 =250MHz fout= finxN MxP , i.e.fout= 27MHzx8 (1x8) =27MHz (1) CDC706 SCAS829A – SEPTEMBER 2006 – REVISED MARCH 2007 The CDC706 is pre-programmed with a factory default configuration as shown below. This puts the device in an operating mode without the need to program it first. The default setting appears after power is switched on or after a power-down/up sequence until it is re-programmed by the user to a different application configuration. A new register setting is programmed via the serial SMBUS Interface. A different default setting can be programmed upon customer request. Contact a Texas Instruments sales or marketing representative for more information. NOTE: All outputs are enabled and in non-inverting mode. S0, S1, and SSC comply according the default setting described in Byte 10 and Byte 25 respectively. Figure 13. Default Device Setting The output frequency can be calculated: 15 Submit Documentation Feedback |
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