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SSC Modulation Amount

SSC Modulation Frequency

3

4

5

6

7

8

9

10

11

12

30

40

50

60

3% Down Spread

2% Down Spread

fmodulation − kHz

+0.4 Center Spread

+0.25 Center Spread

Further EMI Reduction

CDC706

SCAS829A – SEPTEMBER 2006 – REVISED MARCH 2007

In SSC mode, the user can select the SSC modulation amount and SSC modulation frequency. The modulation

amount is the frequency deviation based to the carrier (min/max frequency), whereas the modulation frequency

determines the speed of the frequency variation. In SSC mode, the maximum VCO frequency is limited to 167

MHz.

The CDC706 supports center spread modulation and down spread modulation. In center spread, the clock is

symmetrically shifted around the carrier frequency and can be

±0.1%, ±0.25%, and ±0.4%. At down spread, the

clock frequency is always lower than the carrier frequency and can be 1%, 1.5%, 2%, and 3%. The down spread

is preferred if a system can not tolerate an operating frequency higher than the nominal frequency (over-clocking

problem).

Example:

Modulation Type

Minimum

Center

Maximum

Frequency

Frequency

Frequency

A

±0.25% center spread

53.865 MHz

54 MHz

54.135 MHz

B

1% down spread

53.46 MHz

—

54 MHz

C

53.73 MHz

53.865 MHz

54 MHz

(1)

A down spread of 0.5% of a 54-MHz carrier is equivalent to 59.865 MHz at a center spread of

±0.25%.

The modulation frequency (sweep rate) can be selected between 30 kHz and 60 kHz. It is also based on the

VCO frequency as shown in the SSC Modulation Frequency Selection. As shown in Figure 20, the damping

increases with higher modulation frequencies. It may be limited by the tracking skew of a downstream PLL. The

CDC706 uses a triangle modulation profile which is one of the common profiles for SSC.

The optimum damping is a combination of modulation amount, modulation frequency and the harmonics which

are considered. Note that higher order harmonic frequencies results in stronger EMI reduction because of

respective higher frequency deviation.

As seen in Figure 21 and Figure 22, a slower output slew rate and/or smaller output signal amplitude helps to

reduce EMI emission even more. Both measures reduce the RF energy of clock harmonics. The CDC706 allows

slew rate control in four steps between 0.6 ns and 3.3 ns (Byte 19-24, Bit [5:4]). The output amplitude is set by

lower output supply voltage down to 1.8 V works, but the maximum frequency has to be considered.

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