PCA5007 datasheet(38/112 Pages) PHILIPS

38 / 112 page

1998 Oct 07

Philips Semiconductors

Product speciﬁcation

Pager baseband controller

PCA5007

6.14.2

WAKE-UP COUNTER CONTROL REGISTER (WUCON)

The WUCON special function register is used to control the operation of the wake-up counter by software.

Table 30 Wake-up Counter Control Register (WUCON, SFR address 94H)

Table 31 Description of the WUCON bits

6.14.3

WAKE-UP DATA REGISTERS (WUC0, WUC1)

The WUC0 and WUC1 special function registers are used to define the interval to the next wake-up interrupt.

Table 32 Low Wake-UP Register (WUC0, SFR address 95H)

Table 33 High Wake-UP Register (WUC1, SFR address 96H)

76543210

RUN

WUP

TEST

CPL

LOAD

SET

BIT

SYMBOL

FUNCTION

WUCON.7

RUN

Control signal from the processor.

WUCON.6

WUP

Latched Wake-Up signal. The bit is set by hardware (or software) and generates a

wake-up interrupt if enabled and the DC/DC STB bit is set. The bit needs to be cleared

by software (SFR and 1 V bits). A SET sequence is required to clear the ﬂag on the 1 V

side. Attention: reading the bit reads the contents of the ‘real’ wake-up ﬂag on the 1 V

side, (read/modify/write commands will fail on this bit).

WUCON.5

TEST

Test control signal (uses 76.8 kHz as clock input for high and low counter).

WUCON.4

CPL

Set operation completed. Bit set by hardware when the last operation is completed

and the SFRs are again ready to accept new settings. The bit generates a wake-up

interrupt if enabled. The bit needs to be cleared by software.

WUCON.3

2 bits that are only reset by a primary RESETIN. The bits can be written to and read

from by the software. The bits are not cleared when the DC/DC converter is switched

off. Same procedure for setting the bits as WU0 to WU15 (reading these bits returns the

‘real’ ﬂags on the 1 V side; read/modify/write commands will fail on this bit).

WUCON.2

WUCON.1

LOAD

Load wake-up counter with contents of reload latch (see Fig.19). Is sampled on the

positive edge of SET.

WUCON.0

SET

Clock signal for writing to RUN or wake-up SFR (on 1 V level).

76543210

WU7

WU6

WU5

WU4

WU3

WU2

WU1

WU0

76543210

WU15

WU14

WU13

WU12

WU11

WU10

WU9

WU8

PCA5007 Datasheet(PDF) 38 Page - NXP Semiconductors

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