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ATA6621 Datasheet(PDF) 18 Page - ATMEL Corporation |
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ATA6621 Datasheet(HTML) 18 Page - ATMEL Corporation |
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18 / 27 page ![]() 18 4887D–AUTO–12/06 ATA6621 4EN Input Pin 4.1 Low-level voltage input VENL –0.3 +1.5 V A 4.2 High-level voltage input V ENH 3.5 VCC + 0.3V VA 4.3 Pull-down resistor V EN = 5V R EN 125 250 600 k Ω A 4.4 Low-level input current V EN = 0V I EN –3 +3 µA A 5 NRES Output Pin 5.1 High-level output voltage V S ≥ 5.5V; I nres = –1 mA VNRESH 4.5 V A 5.2 Low-level output voltage V S ≥ 5.5V; Inres = –1 mA I nres = –250 µA VNRESL 0.2 0.14 V V A A 5.3 Low-level output low 10 k Ω to VCC; V CC = 0.8V VNRESLL 0.3 V A 5.4 Undervoltage reset time V VS ≥ 5.5V CNRES = 20 pF t reset 713 ms A 5.5 Reset debounce time for falling edge VVS ≥ 5.5V C NRES =20pF t res_f 3µs A 6 Voltage Regulator VCC Pin in Normal and Pre Normal Mode 6.1 Output voltage VCC 5.5V < V S < 18V (0 mA to 50 mA) VCCnor 4.9 5.1 V A 6.2 Output voltage VCC at low VS 3.3V < V S < 5.5V VCC low VVS – VD 5.1 V A 6.3 Regulator drop voltage VS > 4.0V, IVCC = –20 mA VD1 250 mV A 6.4 Regulator drop voltage VS > 4.0V, IVCC = –50 mA VD2 500 mV A 6.5 Regulator drop voltage VS > 3.3V, IVCC = –15 mA VD3 200 mV A 6.6 Output current VS > 3V IVCC –50 mA A 6.7 Output current limitation VS > 0V IVCCs –200 –130 mA A 6.8 Load capacity 1 Ω < ESR < 5Ω Cload 1.8 2.2 µF D 6.9 VCC undervoltage threshold Referred to VCC V S > 5.5V VthunN 4.4 4.8 V A 6.10 Hysteresis of undervoltage threshold Referred to VCC VS > 5.5V Vhysthun 30 mV A 6.11 Ramp up time VS > 5.5V to VCC > 4.9V CVCC = 4.7 µF No load t VCC 300 µs A 7 Voltage Regulator VCC Pin in Silent Mode 7.1 Output voltage VCC 5.5V < VS < 18V (0 mA to 50 mA) VCCnor 4.65 5.35 V A 7.2 Output voltage VCC at low VS 3.3V < V S <5.5V VCC low V VS – VD 5.1 V A 7.3 Regulator drop voltage VS >3.3V, IVCC =–15 mA VD 200 mV A 5. Electrical Characteristics (Continued) 5V < VS < 18V, Tamb = –40°C to +125°C No. Parameters Test Conditions Pin Symbol Min Typ Max Unit Type* *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter |
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