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DP83816 Datasheet(PDF) 36 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # DP83816
Description  10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPHYTER-II )
PDF  106 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83816 Datasheet(HTML) 36 Page - National Semiconductor (TI)

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4.0 Register Set (Continued)
4.1.10 Configuration Interrupt Select Register
This register stores the interrupt line number as identified by the POST software that is connected to the interrupt
controller as well as DP83816 desired settings for maximum latency and minimum grant. Max latency and Min latency
can be loaded from the EEPROM.
4.1.11 Power Management Capabilities Register
This register provides information on the capabilities of the functions related to power management. This register also
contains a pointer to the next item in the capabilities list and the capability ID for Power Management. This register is only
visible if CFGCS[4] is set.
Tag: CFGINT
Size: 32 bits
Hard Reset: 340b0100h
Offset: 3Ch
Access: Read Write
Soft Reset: unchanged
Bit
Bit Name
Description
31-24
MXLAT
Maximum Latency
The DP83816 desired setting for Max Latency. The DP83816 will initialize this field to 52d (13
µsec). The
value in this register can be loaded from the EEPROM.
23-16
MNGNT
Minimum Grant
The DP83816 desired setting for Minimum Grant. The DP83816 will initialize this field to 11d (2.75
µsec).
The value in this register can be loaded from the EEPROM.
15-8
IPIN
Interrupt Pin
Read Only, always return 0000 0001 (INTA).
7-0
ILINE
Interrupt Line
Set to which line on the interrupt controller that the DP83816's interrupt pin is connected to.
Tag: PMCAP
Size: 32 bits
Hard Reset: FF820001
Offset: 40h
Access: Read Only
Soft Reset: unchanged
Bit
Bit Name
Description
31-27
PMES
PME Support
This 5 bit field indicates the power states in which DP83816 may assert PMEN. A 1 indicates PMEN
is enabled for that state, a 0 indicates PMEN is inhibited in that state.
XXXX1 - PMEN can be asserted from state D0
XXX1X - PMEN can be asserted from state D1
XX1XX - PMEN can be asserted from state D2
X1XXX - PMEN can be asserted from state D3hot
1XXXX - PMEN can be asserted from state D3cold
The DP83816 will only report PME support for D3cold if auxiliary power is detected on the 3VAUX
pin, in addition this value can be loaded from the EEPROM when in the D3cold state.
26
D2S
D2 Support
This bit is set to a 1 when the DP83816 supports the D2 state.
25
D1S
D1 Support
This bit is set to a 1 when the DP83816 supports the D1 state.



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