DP83816 datasheet(49/106 Pages) NSC

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4.0 Register Set (Continued)

Bit

Bit Name

Description

27-26

IFG

Interframe Gap Time

This field allows the user to adjust the interframe gap time below the standard 9.6

µs @10 Mb/s and

960ns @100 Mb/s. The time can be programmed from 9.6

µs to 8.4µs @10 Mb/s and 960ns to 840ns

@100 Mb/s. Note that any value other than zero may violate the IEEE 802.3 standard. The formula for

the interframe gap is:

9.6

µs - 0.4(IFG[1:0]) µs @10 Mb/s and

960ns - 40(IFG[1:0])ns @100 Mb/s

25-24

Reserved for NSC internal use only.

Must be written as a 00 otherwise. R/W

ECRETRY

Excessive Collision Retry Enable

This bit enables automatic retries of excessive collisions. If set, the transmitter will retry the packet up to

4 excessive collision counts, for a total of 64 attempts. If the packet still does not complete successfully,

then the transmission will be aborted after the 64th attempt. If this bit is not set, then the transmit will be

aborted after the 16th attempt. Note that setting this bit will change how collisions are reported in the

status field of the transmit descriptor.

22-20

MXDMA

Max DMA Burst Size per Tx DMA Burst

This field sets the maximum size of transmit DMA data bursts according to the following table:

000 = 128 32-bit words (512 bytes)

001 = 1 32-bit word (4 bytes)

010 = 2 32-bit words (8 bytes)

011 = 4 32-bit words (16 bytes)

100 = 8 32-bit words (32 bytes)

101 = 16 32-bit words (64 bytes)

110 = 32 32-bit words (128 bytes)

111 = 64 32-bit words (256 bytes)

NOTE: The MXDMA setting value MUST not be greater than the TXCFG:FLTH (Tx Fill Threshold) value.

unused

Reserved for NSC internal use only.

Must be set to 1. Setting this bit to 0 selects a non-standard back-off algorithm that could increase the

likelihood of excessive collisions.

17-14

unused

13-8

FLTH

Tx Fill Threshold

Specifies the fill threshold in units of 32 bytes. When the number of available bytes in the transmit FIFO

reaches this level, the transmit bus master state machine will be allowed to request the PCI bus for

transmit packet fragment reads. A value of 0 in this field will produce unexpected results and must not be

used.

Note: The FLTH value should be greater than the TXCFG:MXDMA value, but less than (txFIFOsize -

TXCFG:DRTH). In order to prevent FIFO pointer overlap internal to the device, the sum of the FLTH and

TXCFG:DRTH values should not exceed 2016 Bytes.

7-6

unused

5-0

DRTH

Tx Drain Threshold

Specifies the drain threshold in units of 32 bytes. When the number of bytes in the FIFO reaches this

level (or the FIFO contains at least one complete packet) the MAC transmit state machine will begin the

transmission of a packet.

NOTE: In order to prevent a deadlock condition from occurring, the DRTH value should always be less

than (txFIFOsize - TXCFG:FLTH). A value of 0 in this field will produce unexpected results and must not

be used. Also, in order to prevent FIFO pointer overlap internal to the device, the sum of the DRTH and

TXCFG:FLTH values should not exceed 2016 Bytes.

DP83816 Datasheet(PDF) 49 Page - National Semiconductor (TI)

DP83816 Datasheet(HTML) 49 Page - National Semiconductor (TI)

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