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AD7765 Datasheet(PDF) 5 Page - Analog Devices |
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AD7765 Datasheet(HTML) 5 Page - Analog Devices |
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5 / 32 page ![]() AD7765 Rev. 0 | Page 5 of 32 Parameter Test Conditions/Comments Specification Unit Normal Power Mode AIDD1 (Modulator) 19 mA typ AIDD2 (General)5 MCLK = 40 MHz 13 mA typ AIDD3 (Differential Amplifier) AVDD3 = 5 V 10 mA typ AIDD4 (Reference Buffer) AVDD4 = 5 V 9 mA typ DIDD5 MCLK = 40 MHz 37 mA typ Low Power Mode AIDD1 (Modulator) 10 mA typ AIDD2 (General)5 MCLK = 40 MHz 7 mA typ AIDD3 (Differential Amplifier) AVDD3 = 5 V 5.5 mA typ AIDD4 (Reference Buffer) AVDD4 = 5 V 5 mA typ DIDD5 MCLK = 40 MHz 20 mA typ POWER DISSIPATION Normal Power Mode 300 mW typ MCLK = 40 MHz, decimate 128× 371 mW max Low Power Mode MCLK = 40 MHz, decimate 128× 160 mW typ 215 mW max Power-Down Mode6 PWRDWN held logic low 1 mW typ 1 See Terminology section. 2 SNR specifications in decibels are referred to a full-scale input, FS. Tested with an input signal at 0.5dB below full scale, unless otherwise specified. 3 Output Data Rate (ODR) = [(MCLK/2)]/Decimation Rate. That is, the maximum ODR for AD7765 = [(40 MHz)/2)/128] = 156.25 kHz. 4 Tested with a 400 μA load current. 5 Tested at MCLK = 40 MHz. This current scales linearly with MCLK frequency applied. 6 Tested at 125°C. |
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