TLV9151 datasheet(25/60 Pages) TI1

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This chart can be used to calculate approximate probability of a specification in a unit; for example, for TLV915x-

Q1, the typical input voltage offset is 125 µV, so 68.2% of all TLV915x-Q1 devices are expected to have an offset

from –125 µV to 125 µV. At 4 σ (±500 µV), 99.9937% of the distribution has an offset voltage less than ±500 µV,

which means 0.0063% of the population is outside of these limits, which corresponds to about 1 in 15,873 units.

Specifications with a value in the minimum or maximum column are assured by TI, and units outside these limits

will be removed from production material. For example, the TLV915x-Q1 family has a maximum offset voltage

of 675 µV at 25°C, and even though this corresponds to about 5 σ (≈1 in 1.7 million units), which is extremely

unlikely, TI assures that any unit with larger offset than 895 µV will be removed from production material.

For specifications with no value in the minimum or maximum column, consider selecting a sigma value of

sufficient guardband for the application, and design worst-case conditions using this value. For example, the

6-σ value corresponds to about 1 in 500 million units, which is an extremely unlikely chance, and could be an

option as a wide guardband to design a system around. In this case, the TLV915x-Q1 family does not have

a maximum or minimum for offset voltage drift, but based on Figure 5-2 and the typical value of 0.3 µV/°C in

Section 5.7, it can be calculated that the 6-σ value for offset voltage drift is about 1.8 µV/°C. When designing for

worst-case system conditions, this value can be used to estimate the worst possible offset across temperature

without having an actual minimum or maximum value.

However, process variation and adjustments over time can shift typical means and standard deviations, and

unless there is a value in the minimum or maximum specification column, TI cannot assure the performance of a

device. This information should be used only to estimate the performance of a device.

6.3.9 Shutdown

The TLV915xS-Q1 devices feature one or more shutdown pins (SHDN) that disable the op amp, placing the

amplifier into a low-power standby mode. In this mode, the op amp typically consumes about 30 µA. The SHDN

pins are active high, meaning that shutdown mode is enabled when the input to the SHDN pin is a valid logic

high.

The SHDN pins are referenced to the negative supply rail of the op amp. The threshold of the shutdown feature

lies around 800 mV (typical) and does not change with respect to the supply voltage. Hysteresis has been

included in the switching threshold to provide smooth switching characteristics. For proper shutdown behavior,

the SHDN pins must be driven with valid logic signals. A valid logic low is defined as a voltage between V– and

V– + 0.2 V. A valid logic high is defined as a voltage between V– + 1.1 V and V+. The shutdown pin circuitry

includes a pulldown resistor, which inherently pulls the voltage of the pin to the negative supply rail if not driven.

Thus, to enable the amplifier, the SHDN pins must either be left floating or driven to a valid logic low. To disable

the amplifier, the SHDN pins must be driven to a valid logic high. The maximum voltage allowed at the SHDN

pins is V+. Exceeding this voltage level can damage the device.

The SHDN pins are high-impedance CMOS inputs. Channels of single and dual op amp packages are

independently controlled, and channels of quad op amp packages are controlled in pairs. For battery-operated

applications, this feature can be used to greatly reduce the average current and extend battery life. The

typical enable time out of shutdown is 8 µs; disable time is 3 µs. When disabled, the output assumes a high-

impedance state. This architecture allows the TLV915xS-Q1 family to operate as a gated amplifier, multiplexer,

or programmable-gain amplifier. Shutdown time (tOFF) depends on loading conditions and increases as load

resistance increases. To keep shutdown (disable) within a specific shutdown time, the specified 10-kΩ load to

midsupply (VS / 2) is required. If using the TLV915xS-Q1 without a load, the resulting turnoff time significantly

increases.

6.4 Device Functional Modes

The TLV915x-Q1 has a single functional mode and is operational when the power-supply voltage is greater than

2.7 V (±1.35 V). The maximum power supply voltage for the TLV915x-Q1 is 16 V (±8 V).

The TLV915xS-Q1 devices feature a shutdown pin, which can be used to place the op amp into a low-power

mode. See Section 6.3.9 for more information.

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TLV9151-Q1, TLV9152-Q1, TLV9154-Q1

SBOSA23G – MAY 2020 – REVISED MARCH 2024

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