33689D datasheet(12/31 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33689

ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

Table 4. Dynamic Electrical Characteristics

Characteristics noted under conditions 5.5 V

≤ V

SUP ≤ 18 V, - 40°C ≤ T

A ≤ 125°C, GND = 0.0 V unless otherwise noted.

Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

SPI INTERFACE CHARACTERISTICS

SPI Operation Frequency

fSPI

0.25

—

4.0

MHz

SCLK Clock Period

tPSCLK

250

—

N/A

SCLK Clock High Time

tWSCLKH

125

—

N/A

SCLK Clock Low Time

tWSCLKL

125

—

N/A

Falling Edge of CS to Rising Edge of SCLK

tLEAD

100

—

N/A

Falling Edge of SCLK to CS Rising Edge

tLAG

100

—

N/A

MOSI to Falling Edge of SCLK (Data Setup Time)

tSI(SU)

—

N/A

Falling Edge of SCLK to MOSI (Data Hold Time)

tSI(HOLD)

—

N/A

MISO Rise Time (14)

CL = 220 pF

tRSO

—

MISO Fall Time (14)

CL = 220 pF

tFSO

—

Time from Falling or Rising Edge of CS to: (14)

MISO Low Impedance (Enable)

MISO High Impedance (Disable)

tSO(EN)

tSO(DIS)

0.0

—

Time from Rising Edge of SCLK to MISO Data Valid (14)

0.2 VDD ≤ MISO ≥ 0.8 VDD, CL = 100 pF

tVALID

0.0

—

RST

OUTPUT PIN IN NORMAL AND STOP MODES

Reset Duration After VDD HIGH

tDURRST

0.65

1.0

1.35

WDC

Watchdog Period Accuracy Using an External Resistor (Excluding Resistor

Tolerances) (15)

ACCWDC

-15

—

Watchdog Time Period (15)

10 k

Ω External Resistor

100 k

Ω External Resistor

No External Resistor, WDC Open, Normal Mode

tWDC

—

107

10.558

99.748

160

—

215

Notes

14.

Parameter guaranteed by design; however, it is not production tested.

15.

Watchdog time period calculation formula:

tWDC = 0.991 * R + 0.648 (R in kΩ and tWDC in ms).

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