33689D datasheet(14/31 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33689

ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

LIN PHYSICAL LAYER: BUS DRIVER TIMING CHARACTERISTICS FOR NORMAL SLEW RATE (20)

Propagation Delay TXD to LIN (21)

Dominant State Minimum Threshold (50% TXD to 58.1% VSUP)

Dominant State Maximum Threshold (50% TXD to 28.4% VSUP)

Recessive State Minimum Threshold (50% TXD to 42.2% VSUP)

Recessive State Maximum Threshold (50% TXD to 74.4% VSUP)

tDOMMIN

tDOMMAX

tRECMIN

tRECMAX

—

µs

Propagation Delay Symmetry

tDOMMIN - tRECMAX

tDOMMAX - tRECMIN

dt1s

dt2s

-10.44

—

µs

LIN PHYSICAL LAYER: BUS DRIVER TIMING CHARACTERISTICS FOR SLOW SLEW RATE (20)

Propagation Delay TXD to LIN (22)

Dominant State Minimum Threshold (50% TXD to 61.6% VSUP)

Dominant State Maximum Threshold (50% TXD to 25.1% VSUP)

Recessive State Minimum Threshold (50% TXD to 38.9% VSUP)

Recessive State Maximum Threshold (50% TXD to 77.8% VSUP)

tDOMMIN

tDOMMAX

tRECMIN

tRECMAX

—

100

µs

Propagation Delay Symmetry

tDOMMIN - tRECMAX

tDOMMAX - tRECMIN

dt1s

dt2s

-22

—

µs

LIN PHYSICAL LAYER: BUS DRIVER FAST SLEW RATE

LIN High Slew Rate (Programming Mode)

dv/dt Fast

—

µs

LIN PHYSICAL LAYER, TRANSCEIVER

Output Current Shutdown Delay (23)

tOUTDLY

—

µs

Notes

20.

7.0 V < VSUP < 18 V, bus load C0 and R0 1.0 nF/1.0 kΩ, 6.8 nF/660 Ω, 10 nF/500 Ω. 50% of TXD signal to LIN signal threshold. See

Figure 5, page 16.

21.

See Figure 7, page 17.

22.

See Figure 8, page 17.

23.

Parameter guaranteed by design; however, it is not production tested.

Table 4. Dynamic Electrical Characteristics (continued)

Characteristics noted under conditions 5.5 V

≤ V

SUP ≤ 18 V, - 40°C ≤ T

A ≤ 125°C, GND = 0.0 V unless otherwise noted.

Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

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