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SAA6721 Datasheet(PDF) 8 Page - NXP Semiconductors |
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SAA6721 Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 72 page ![]() 1999 May 11 8 Philips Semiconductors Preliminary specification SXGA RGB to TFT graphics engine SAA6721E CLAMP N2 RGB/YUV input output clamp pulse for analog-to-digital converter GAINC N3 RGB/YUV input output gain correction pulse for analog-to-digital converter PCLK Y13 panel interface output panel clock PVS V12 panel interface output panel vertical sync PHS W12 panel interface output panel horizontal sync PDE U12 panel interface output panel data enable PAR7 P1 panel interface output panel port A red channel PAR6 P4 panel interface output PAR5 P2 panel interface output PAR4 P3 panel interface output PAR3 R1 panel interface output PAR2 R2 panel interface output PAR1 R3 panel interface output PAR0 T1 panel interface output PAG7 T4 panel interface output panel port A green channel PAG6 T2 panel interface output PAG5 T3 panel interface output PAG4 U1 panel interface output PAG3 U2 panel interface output PAG2 V1 panel interface output PAG1 V2 panel interface output PAG0 W1 panel interface output PAB7 Y1 panel interface output panel port A blue channel PAB6 W2 panel interface output PAB5 Y2 panel interface output PAB4 V3 panel interface output PAB3 W3 panel interface output PAB2 Y3 panel interface output PAB1 V4 panel interface output PAB0 Y4 panel interface output PBR7 V5 panel interface output panel port B red channel PBR6 W5 panel interface output PBR5 Y5 panel interface output PBR4 V6 panel interface output PBR3 W6 panel interface output PBR2 Y6 panel interface output PBR1 V7 panel interface output PBR0 W7 panel interface output SYMBOL PIN PORT I/O(1) DESCRIPTION |
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