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MAX2016 Datasheet(PDF) 12 Page - Maxim Integrated Products |
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MAX2016 Datasheet(HTML) 12 Page - Maxim Integrated Products |
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12 / 20 page ![]() LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements 12 ______________________________________________________________________________________ impedance results, leading to an increase in reflected power and subsequent change in the transmission line’s VSWR. This increase in reflected power is mani- fested by an increase in the voltage at OUTD. An alarm condition can be set by using the low comparator out- put (COUTL) as shown in Figure 1. The comparator automatically senses the change in VSWR, yielding a logic 0 as it compares OUTD to a low DC voltage at CSETL. CSETL, in turn, is set by using the internal refer- ence voltage and an external resistor-divider network. For accurate measurement of signals carrying signifi- cant amplitude modulation, limit the bandwidth of the difference amplifier to be less than the lowest modula- tion frequency. This will minimize the ripple in the OUTD waveform. This is particularly appropriate if the system-level time delay between the two sense points is significant with respect to the period of modulation. Figure 1 illustrates a simple level detector. For window- detector implementation, see the Comparator/Window Detector section. Measuring VSWR and Return Loss In Figure 2, the two logarithmic amplifiers measure the incident and the reflected power levels to produce two proportional output voltages at OUTA and OUTB. Since OUTD is a DC voltage proportional to the difference of OUTA and OUTB, return loss (RL) and VSWR can be easily calculated within a microprocessor using the following relationships: where return loss (RL) is expressed in decibels, VCENTER is the output voltage (typically 1V) when PRFINA = PRFINB, and SLOPE is typically equal to -25mV/dB (for R3 = 0 Ω). VSWR can similarly be calculated through the following relationship: VSWR RL RL = + − − − ⎛ ⎝ ⎞ ⎠ ⎛ ⎝ ⎞ ⎠ 110 110 20 20 RL P P VV SLOPE RFINA RFINB OUTD CENTER =− = − () MAX2016 RFINA RFINB GND ADC μP IN LOAD 4-PORT DIRECTIONAL COUPLER LOGARITHMIC DETECTOR LOGARITHMIC DETECTOR OUTD SETD 20k Ω Figure 2. Measuring Return Loss and VSWR of a Given Load |
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