ZDP323B Series Digital PIR Sensor

Product Specification

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PS041703-0324 - Preliminary

Page 11

9.6.1 Trigger Output Operation Example

Refer to Figure 14 for the following description.

A:

I2C transaction. Host MCU enables Trigger Output mode by setting TRIGOM (Configuration

register bit 23) to a 1. The Detection Counter is reset to 0.

B:

Signal Output exceeds Detection Threshold; Detection Counter = 1

C:

Signal Output still exceeds ½ Detection Threshold; Detection Counter = 2; Trigger Output

(SDA/TRIG) activated (driven low) for 50µs.

D:

I2C transaction. Host MCU disables Trigger Output mode by writing TRIGOM to 0.

E:

I2C transaction. Host reads Peak Hold data. This is required when multiple ZDP323B

devices are connected on the same I2C bus. Reading Peak Hold data allows the Host MCU

to determine which device activated the Output Trigger since the Peak Hold data value will

be greater than the Detection Threshold. If only a single device is on the I2C bus, steps D

and E are not necessary.

SDA/TRIG (Pin 1)

Signal Output

Detection Threshold

Detection Threshold * 0.5

Detection Threshold

Detection Threshold * 0.5

0

1

2

0

0

0

0

0

1

2

TCYC

Detection Counter

Value

Trigger Mode Inactive

A

A

C D E

C D E

A

C

B

B

C

x

Figure 14 - Trigger Output Mode Example

Note:

Trigger Output mode should be enabled only when the signal output is less than the ½

Detection Threshold. The following procedure can be used to ensure this:

1. Write the Detection Threshold (Configuration register bits 15 to 22) to its maximum

value (FFh).

2. Continually read the Peak Hold value every 10ms until the value is below ½ the

Detection Threshold value (7Fh).

3. Write the Configuration register with the required Detection Threshold, filter

selection and Trigger Output mode enabled.