AD5674 datasheet(30/32 Pages) AD

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AD5674/AD5674R/AD5679/AD5679R

Data Sheet

Rev. B | Page 30 of 32

APPLICATIONS INFORMATION

POWER SUPPLY RECOMMENDATIONS

The following supplies typically power the AD5674/AD5674R/

AD5679/AD5679R: VDD = 3.3 V and VLOGIC = 1.8 V.

The ADP7118 can be used to power the VDD pin. The ADP160

can be used to power the VLOGIC pin. Figure 67 shows this setup.

The ADP7118 can operate from input voltages up to 20 V. The

ADP160 can operate from input voltages up to 5.5 V.

Figure 67. Low Noise Power Solution for the

AD5674/AD5674R/AD5679/AD5679R

MICROPROCESSOR INTERFACING

Microprocessor interfacing to the AD5674/AD5674R/AD5679/

AD5679R is performed via a serial bus that uses a standard

protocol compatible with DSP processors and microcontrollers.

The communications channel requires a 3-wire or 4-wire interface

consisting of a clock signal, a data signal, and a synchronization

signal. The device requires a 24-bit data-word with data valid

on the rising edge of SYNC.

AD5674/AD5674R/AD5679/AD5679R TO ADSP-

BF531 INTERFACE

The SPI interface of the AD5674/AD5674R/AD5679/AD5679R

can connect to industry-standard DSPs and microcontrollers.

Figure 68 shows the AD5674/AD5674R/AD5679/AD5679R

connected to the Analog Devices Blackfin® DSP. The Blackfin

has an integrated SPI port that can connect directly to the SPI

pins of the AD5674/AD5674R/AD5679/AD5679R.

Figure 68. ADSP-BF531 Interface

AD5674/AD5674R/AD5679/AD5679R TO SPORT

INTERFACE

The Analog Devices ADSP-BF527 has one SPORT® serial port.

Figure 69 shows how a SPORT interface is used to control the

AD5674/AD5674R/AD5679/AD5679R.

Figure 69. SPORT Interface

LAYOUT GUIDELINES

In any circuit where accuracy is important, careful consideration

of the power supply and ground return layout helps to ensure

the rated performance. Design the PCB on which the AD5674/

AD5674R/AD5679/AD5679R is mounted so that the device lies

on the analog plane.

The AD5674/AD5674R/AD5679/AD5679R must have ample

supply bypassing of 10 µF in parallel with 0.1 µF on each supply,

located as close to the package as possible, ideally up against the

device. The 10 µF capacitors are tantalum bead type. The 0.1 µF

capacitors must have low effective series resistance (ESR) and low

effective series inductance (ESI), such as the common ceramic

types, which provide a low impedance path to ground at high

frequencies to handle transient currents due to internal logic

switching.

In systems where there are many devices on one board, it is often

useful to provide some heat sinking capability to allow the

power to dissipate easily.

The GND plane on the device can be increased (as shown in

Figure 70) to provide a natural heat sinking effect.

Figure 70. Pad Connection to the Board

ADP160

LDO

1.8V: VLOGIC

ADP7118

LDO

3.3V: VDD

INPUT

ADSP-BF531

SYNC

SPISELx

SCLK

SCK

LDAC

PF9

RESET

PF8

SDI

MOSI

AD5679R/

AD5679/

AD5674R/

AD5674

ADSP-BF531

SYNC

TFS0

SCLK

TSCLK0

LDAC

PF8

RESET

PF9

SDI

DT0PRI

AD5679R/

AD5679/

AD5674R/

AD5674

GND PLANE

BOARD

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