AD2426 datasheet(23/38 Pages) AD

23 / 38 page

AD2426/AD2427/AD2428

Rev. F

Page 23 of 38

November 2023

Capacitive Loading

Output delays and holds are based on standard capacitive loads

of an average of 6 pF on all pins (see Figure 29). VLOAD is equal

to VIOVDD/2. Figure 30 through Figure 33 show how output rise

time varies with capacitance. The delay and hold specifications

given must be derated by a factor derived from these figures.

The graphs in Figure 30 through Figure 33 cannot be linear out-

side the ranges shown.

Figure 29. Equivalent Device Loading for AC Measurements

(Includes All Fixtures)

Figure 30. Digital I/O Driver Typical Rise and Fall Times (10% to 90%)

vs. Load Capacitance (VIOVDD = 1.8 V, TJ = 25°C)

ZO = 50

(impedance)

TD = 4.04

r 1.18 ns

2pF

TESTER PIN ELECTRONICS

0.5pF

400

4pF

NOTES:

THE WORST CASE TRANSMISSION LINE DELAY IS SHOWN AND CAN BE USED

FOR THE OUTPUT TIMING ANALYSIS TO REFLECT THE TRANSMISSION LINE

EFFECT AND MUST BE CONSIDERED. THE TRANSMISSION LINE (TD) IS FOR

LOAD ONLY AND DOES NOT AFFECT THE DATA SHEET TIMING SPECIFICATIONS.

ANALOG DEVICES RECOMMENDS USING THE IBIS MODEL TIMING FOR A GIVEN

SYSTEM REQUIREMENT. IF NECESSARY, THE SYSTEM CAN INCORPORATE

EXTERNAL DRIVERS TO COMPENSATE FOR ANY TIMING DIFFERENCES.

VLOAD

DUT

OUTPUT

10152025303540

tRISE

tFALL

LOAD CAPACITANCE (pF)

DRIVE STRENGTH = 0

Figure 31. Digital I/O Driver Typical Rise and Fall Times (10% to 90%)

vs. Load Capacitance (VIOVDD = 1.8 V, TJ = 25°C)

Figure 32. Digital I/O Driver Typical Rise and Fall Times (10% to 90%)

vs. Load Capacitance (VIOVDD = 3.3 V, TJ = 25°C)

Figure 33. Digital I/O Driver Typical Rise and Fall Times (10% to 90%)

vs. Load Capacitance (VIOVDD = 3.3 V, TJ = 25°C)

1015202530354045

tRISE

tFALL

LOAD CAPACITANCE (pF)

DRIVE STRENGTH = 1

tRISE

tFALL

LOAD CAPACITANCE (pF)

DRIVE STRENGTH = 0

tRISE

tFALL

LOAD CAPACITANCE (pF)

DRIVE STRENGTH = 1

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