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SD60C31/P Datasheet(PDF) 6 Page - AUK corp |
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SD60C31/P Datasheet(HTML) 6 Page - AUK corp |
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6 / 12 page ![]() KSI-W001-000 6 Pin Description(continued) • Crystal oscillator Idle Mode In the Idle mode, the CPU puts itself to sleep while all the on chip peripherals stay active. The instruction that invokes the Idle mode is the last instruction executed in the normal operating mode before Idle mode is activated. The content of the on-chip RAM and all the special function registers remain intact during this mode. The Idle mode can be terminated either by any enabled interrupt, at which time the process is picked up at the interrupt service routine and continued, or by a hardware reset which starts the processor the same as a power on reset. Power Down Mode In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and special function register retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. The control bits for the reduced power modes are in the special function register PCON. Table Status of the external pins during Idle and power down modes. Mode Program memory ALE PSEN PORT 0 PORT 1 PORT 2 PORT 3 Idle Internal 1 1 Data Data Data Data Idle External 1 1 Float Data Address Data Power down Internal 0 0 Data Data Data Data Power down External 0 0 Float Data Data Data SD60C31/P SD60C51/P 30pF 30pF VSS XTAL1 XTAL2 |
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