| Electronic Components Datasheet Search |
|
LM2506 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
LM2506 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
|
1 / 19 page ![]() LM2506 Low Power Mobile Pixel Link (MPL) Level 0, 18-bit RGB Display Interface Serializer and Deserializer General Description The LM2506 device adapts RGB style display interfaces to the Mobile Pixel Link (MPL) Level zero serial link. The LM2506 supports one RGB display at up to 18-bit color depth and 800 X 300 pixels (over 216 Mbps and 13.2 MHz PCLK) is supported. A mode pin configures the device as a Serializer (SER) or Deserializer (DES) so the same chip can be used on both sides of the interface. The interconnect is reduced from 22 signals to only 3 active signals with the LM2506 chipset easing flex interconnect design, size constraints and cost. The LM2506 in SER mode resides beside an application, graphics or baseband processor and translates a parallel bus from LVCMOS levels to serial Mobile Pixel Link levels for transmission over a flex cable (or coax) and PCB traces to the DES located near the display module. When the Power_Down (PD*) input is asserted on the SER, the MDn and MC line drivers are powered down to save current. The DES can be controlled by a separate Power- _Down input or via a signal from the SER (PD OUT*). The LM2506 implements the physical layer of the MPL Level 0 Standard (MPL-0) and a 150 µA I B current (Class 0). Features n RGB Display Interface support up to 800 x 300 1⁄2SVGA formats n MPL-Level 0 Physical Layer using two data and one clock signal n Low Power Consumption n Pinout mirroring enables straight through layout with minimal vias n Level translation between host and display n Auto Power Down on STOP PCLK n Link power down mode reduces quiescent power under < 10 µA n 1.74V to 2.0V core / analog supply voltage range n 1.74V to 3.0V I/O supply voltage range n −30C to 85C Operating temperature range System Benefits n Small Interface n Low Power n Low EMI n Intrinsic Level Translation Typical Application Diagram - Bridge Chips 20125522 August 2006 © 2006 National Semiconductor Corporation DS201255 www.national.com |
Similar Part No. - LM2506 |
|
Similar Description - LM2506 |
|
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |