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AM79C940 Datasheet(PDF) 73 Page - Advanced Micro Devices |
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AM79C940 Datasheet(HTML) 73 Page - Advanced Micro Devices |
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73 / 144 page  73 does not disturb the physical medium and will prohibit frame reception from the network. One Internal loopback function in- cludes the MENDEC in the loop. Bit 0 FD_TEST Full Duplex Test. When set, will allow the MACE device to transmit back to back packets with 9.6 µs IPG regardless of receive activities. The setting of this bit should also be in conjunction with the setting of Bit 0 of the Transmit Frame Con- trol (XMTFC) (REG ADDR 2). The setting of Bit 0 of the XMTFC register will cause dis- abling of transmit FCS. To activate Full Duplex Test mode, program the MACE device into external loopback mode (EXLOOP=1, INLOOP=0) and set FD_TEST=1. The code sequence would be as follows: write 2 08 ;register XMTFC, transmit FCS disable write 29 0b ;register UTR, receive FCS enable external loop enable, full duplex enable Reserved Test Register 1 (RTR1) (REG ADDR 30) Reserved for AMD internal use only. Reserved Test Register 2 (RTR2) (REG ADDR 31) Reserved for AMD internal use only. |
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