| Electronic Components Datasheet Search |
|
AD7768BSTZ Datasheet(PDF) 21 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD7768BSTZ Datasheet(HTML) 21 Page - Analog Devices |
|
21 / 106 page ![]() Data Sheet AD7768/AD7768-4 ABSOLUTE MAXIMUM RATINGS analog.com Rev. C | 21 of 106 Table 7. Parameter Rating AVDD1, AVDD2 to AVSS1 −0.3 V to +6.5 V AVDD1 to DGND −0.3 V to +6.5 V IOVDD to DGND −0.3 V to +6.5 V IOVDD, DREGCAP to DGND (IOVDD Tied to DREGCAP for 1.8 V Operation) −0.3 V to +2.25 V IOVDD to AVSS −0.3 V to +7.5 V AVSS to DGND −3.25 V to +0.3 V Analog Input Voltage to AVSS −0.3 V to AVDD1 + 0.3 V Reference Input Voltage to AVSS −0.3 V to AVDD1 + 0.3 V Digital Input Voltage to DGND −0.3 V to IOVDD + 0.3 V Digital Output Voltage to DGND −0.3 V to IOVDD + 0.3 V Operating Temperature Range −40°C to +105°C Storage Temperature Range −65°C to +150°C Pb-Free Temperature, Soldering Reflow (10 sec to 30 sec) 260°C Maximum Junction Temperature 150°C Maximum Package Classification Temperature 260°C 1 Transient currents of up to 100 mA do not cause silicon-controlled rectifier (SCR) latch-up. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operat- ing conditions for extended periods may affect product reliability. THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Table 8. Thermal Resistance Package Type θJA θJC Unit JEDEC Board Layers ST-64-2 38 9.2 °C/W 2P2S1 1 2P2S is a JEDEC standard PCB configuration per JEDEC Standard JESD51-7. ESD CAUTION ESD (electrostatic discharge) sensitive device. Charged devi- ces and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |