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M68HC08 Datasheet(PDF) 212 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 212 Page - Freescale Semiconductor, Inc |
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212 / 288 page ![]() Sync Processor Data Sheet MC68HC908BD48 — Rev. 2.1 212 Sync Processor Freescale Semiconductor Table 16-2. Sync Processor I/O Register Summary Addr. Register Name Bit 7 654321 Bit 0 $0040 Sync Processor Control and Status Register (SPCSR) Read: VSIE VEDGE VSIF COMP VINVO HINVO VPOL HPOL Write: 0 Reset: 00000000 $0041 Vertical Frequency High Register (VFHR) Read: VOF 0 0 VF12 VF11 VF10 VF9 VF8 Write: CPW1 CPW0 Reset: 00000000 $0042 Vertical Frequency Low Register (VFLR) Read: VF7 VF6 VF5 VF4 VF3 VF2 VF1 VF0 Write: Reset: 00000000 $0043 Hsync Frequency High Register (HFHR) Read: HFH7 HFH6 HFH5 HFH4 HFH3 HFH2 HFH1 HFH0 Write: Reset: 00000000 $0044 Hsync Frequency Low Register (HFLR) Read: HOVER 0 0 HFL4 HFL3 HFL2 HFL1 HFL0 Write: Reset: 00000000 $0045 Sync Processor I/O Control Register (SPIOCR) Read: VSYNCS HSYNCS COINV R SOGSEL CLAMPOE BPOR SOUT Write: Reset: 00000000 $0046 Sync Processor Control Register 1 (SPCR1) Read: LVSIE LVSIF HPS1 HPS0 R R ATPOL FSHF Write: 0 Reset: 00000000 $0047 H&V Sync Output Control Register (HVOCR) Read: R 0000 HVOCR2 HVOCR1 HVOCR0 Write: Reset: 00000000 = Unimplemented R = Reserved |
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