M68HC08 datasheet(211/288 Pages) FREESCALE

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Sync Processor

MC68HC908BD48 — Rev. 2.1

Data Sheet

Freescale Semiconductor

Sync Processor

211

16.3 Features

Features of the Sync Processor include the following:

•

Polarity detector

•

Horizontal frequency counter

•

Vertical frequency counter

•

Low vertical frequency indicator (40.7Hz)

•

Polarity controlled HSYNCO and VSYNCO outputs:

–

From separate Hsync and Vsync

–

From composite sync on HSYNC or SOG input pin

–

From internal selectable free running Hsync and Vsync pulses

•

CLAMP pulse output to the external pre-amp chip

•

Internal schmitt trigger on HSYNC, VSYNC, and SOG input pins

to improve noise immunity

16.4 I/O Pins

The Sync Processor uses six I/O pins, with four pins shared with

standard port I/O pins. The full name of the Sync Processor I/O pins are

listed in Table 16-1

. The generic pin name appear in the text that

follows.

Table 16-1. Pin Name Conventions

Sync Processor

Generic Pin Names:

Full MCU Pin Names:

Pin Selected for

Sync Processor Function By:

HSYNC

—

VSYNC

—

SOG

PTE0/SOG/TCH0

SOGE bit in CONFIG1 ($001D)

HSYNCO

PTE1/HSYNCO

HSYNCOE bit in CONFIG 1 ($001D)

VSYNCO

PTE2/VSYNCO

VSYNCOE bit in CONFIG 1 ($001D)

CLAMP

PTD4/CLAMP

CLAMPE bit in PDCR ($0049)

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