M68HC08 datasheet(141/288 Pages) FREESCALE

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Timer Interface Module (TIM)

MC68HC908BD48 — Rev. 2.1

Data Sheet

Freescale Semiconductor

Timer Interface Module (TIM)

141

NOTE:

Reset the TIM counter before writing to the TIM counter modulo registers.

10.10.4 TIM Channel Status and Control Registers (TSC0:TSC1)

Each of the TIM channel status and control registers does the following:

•

Flags input captures and output compares

•

Enables input capture and output compare interrupts

•

Selects input capture, output compare, or PWM operation

•

Selects high, low, or toggling output on output compare

•

Selects rising edge, falling edge, or any edge as the active input

capture trigger

•

Selects output toggling on TIM overflow

•

Selects 0% and 100% PWM duty cycle

•

Selects buffered or unbuffered output compare/PWM operation

Address:

$000E

TMODH

Bit 7

654321

Bit 0

Read:

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

Write:

Reset:

11111111

Address:

$000F

TMODL

Bit 7

654321

Bit 0

Read:

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Write:

Reset:

11111111

Figure 10-5. TIM Counter Modulo Registers (TMODH:TMODL)

M68HC08 Datasheet(PDF) 141 Page - Freescale Semiconductor, Inc

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