H838024R datasheet(164/697 Pages) RENESAS

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Section 5 Power-Down Modes

Rev. 7.00 Mar 10, 2005 page 122 of 652

REJ09B0042-0700

11. On the H8/38124 Group, operates only when the on-chip oscillator is selected; otherwise stops and stands by. On

the H8/38024, H8/38024S, and H8/38024R Group, stops and stands by.

5.1.1

System Control Registers

The operation mode is selected using the system control registers described in table 5.3.

Table 5.3

System Control Registers

Name

Abbreviation

R/W

Initial Value

Address

System control register 1

SYSCR1

R/W

H'07

H'FFF0

System control register 2

SYSCR2

R/W

H'F0

H'FFF1

System Control Register 1 (SYSCR1)

Bit

Initial value

Read/Write

SSBY

R/W

STS2

R/W

STS1

R/W

STS0

R/W

LSON

R/W

MA0

R/W



MA1

R/W

SYSCR1 is an 8-bit read/write register for control of the power-down modes.

Upon reset, SYSCR1 is initialized to H'07.

Bit 7—Software Standby (SSBY)

This bit designates transition to standby mode or watch mode.

Bit 7

SSBY

Description

• When a SLEEP instruction is executed in active mode,

(initial value)

a transition is made to sleep mode

• When a SLEEP instruction is executed in subactive mode, a transition is made to

subsleep mode

• When a SLEEP instruction is executed in active mode, a transition is made to

standby mode or watch mode

• When a SLEEP instruction is executed in subactive mode, a transition is made to

watch mode

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