LPC43S37 datasheet(21/157 Pages) NXP

21 / 157 page

LPC43S5X_S3X

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Product data sheet

Rev. 1.3 — 13 January 2020

21 of 157

NXP Semiconductors

LPC43S5x/S3x

32-bit ARM Cortex-M4/M0 microcontroller

P3_5

C12

173

121

[2]

I/O GPIO1[15] — General purpose digital input/output pin.

R — Function reserved.

I/O SPIFI_SIO2 — I/O lane 2 for SPIFI.

U1_RXD — Receiver input for UART 1.

I/O I2S0_TX_SDA — I2S transmit data. It is driven by the

transmitter and read by the receiver. Corresponds to the signal

SD in the I2S-bus specification.

I/O I2S1_RX_WS — Receive Word Select. It is driven by the

master and received by the slave. Corresponds to the signal

WS in the I2S-bus specification.

LCD_VD12 — LCD data.

P3_6

B13

174

122

[2]

I/O GPIO0[6] — General purpose digital input/output pin.

I/O SPI_MISO — Master In Slave Out for SPI.

I/O SSP0_SSEL — Slave Select for SSP0.

I/O SPIFI_MISO — Input 1 in SPIFI quad mode; SPIFI output IO1.

R — Function reserved.

I/O SSP0_MISO — Master In Slave Out for SSP0.

R — Function reserved.

P3_7

C11

176

123

[2]

R — Function reserved.

I/O SPI_MOSI — Master Out Slave In for SPI.

I/O SSP0_MISO — Master In Slave Out for SSP0.

I/O SPIFI_MOSI — Input I0 in SPIFI quad mode; SPIFI output

IO0.

I/O GPIO5[10] — General purpose digital input/output pin.

I/O SSP0_MOSI — Master Out Slave in for SSP0.

R — Function reserved.

P3_8

C10

179

124

[2]

R — Function reserved.

SPI_SSEL — Slave Select for SPI. Note that this pin in an

input pin only. The SPI in master mode cannot drive the CS

input on the slave. Any GPIO pin can be used for SPI chip

select in master mode.

I/O SSP0_MOSI — Master Out Slave in for SSP0.

I/O SPIFI_CS — SPIFI serial flash chip select.

I/O GPIO5[11] — General purpose digital input/output pin.

I/O SSP0_SSEL — Slave Select for SSP0.

R — Function reserved.

Table 3.

Pin description …continued

Pin name

Description

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