LPC43S37 datasheet(76/157 Pages) NXP

76 / 157 page

LPC43S5X_S3X

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Product data sheet

Rev. 1.3 — 13 January 2020

76 of 157

NXP Semiconductors

LPC43S5x/S3x

32-bit ARM Cortex-M4/M0 microcontroller

• Supports IEEE1588 time stamping and IEEE 1588 advanced time stamping (IEEE

1588-2008 v2).

7.19 Digital serial peripherals

7.19.1 UART1

Remark: The LPC43S5x/S3x contain one UART with standard transmit and receive data

lines.

UART1 also provides a full modem control handshake interface and support for

RS-485/9-bit mode allowing both software address detection and automatic address

detection using 9-bit mode.

UART1 includes a fractional baud rate generator. Standard baud rates such as 115200 Bd

can be achieved with any crystal frequency above 2 MHz.

7.19.1.1 Features

• Maximum UART data bit rate of 8 MBit/s.

• 16 B Receive and Transmit FIFOs.

• Register locations conform to 16C550 industry standard.

• Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.

• Built-in fractional baud rate generator covering wide range of baud rates without a

need for external crystals of particular values.

• Auto baud capabilities and FIFO control mechanism that enables software flow

control implementation.

• Equipped with standard modem interface signals. This module also provides full

support for hardware flow control.

• Support for RS-485/9-bit/EIA-485 mode (UART1).

• DMA support.

7.19.2 USART0/2/3

Remark: The LPC43S5x/S3x contain three USARTs. In addition to standard transmit and

receive data lines, the USARTs support a synchronous mode.

The USARTs include a fractional baud rate generator. Standard baud rates such as

115200 Bd can be achieved with any crystal frequency above 2 MHz.

7.19.2.1 Features

• Maximum UART data bit rate of 8 MBit/s.

• 16 B Receive and Transmit FIFOs.

• Register locations conform to 16C550 industry standard.

• Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.

• Built-in fractional baud rate generator covering wide range of baud rates without a

need for external crystals of particular values.

• Auto baud capabilities and FIFO control mechanism that enables software flow

control implementation.

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