LPC43S37 datasheet(36/157 Pages) NXP

36 / 157 page

LPC43S5X_S3X

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Product data sheet

Rev. 1.3 — 13 January 2020

36 of 157

NXP Semiconductors

LPC43S5x/S3x

32-bit ARM Cortex-M4/M0 microcontroller

P9_5

[2]

R — Function reserved.

MCOA1 — Motor control PWM channel 1, output A.

USB1_PPWR — VBUS drive signal (towards external charge

pump or power management unit); indicates that VBUS must

be driven (active high).

Add a pull-down resistor to disable the power switch at reset.

This signal has opposite polarity compared to the USB_PPWR

used on other NXP LPC parts.

R — Function reserved.

I/O GPIO5[18] — General purpose digital input/output pin.

ENET_TXD3 — Ethernet transmit data 3 (MII interface).

I/O SGPIO3 — General purpose digital input/output pin.

U0_TXD — Transmitter output for USART0.

P9_6

L11

103

[2]

I/O GPIO4[11] — General purpose digital input/output pin.

MCOB1 — Motor control PWM channel 1, output B.

USB1_PWR_FAULT — USB1 Port power fault signal

indicating over-current condition; this signal monitors

over-current on the USB1 bus (external circuitry required to

detect over-current condition).

R — Function reserved.

ENET_COL — Ethernet Collision detect (MII interface).

I/O SGPIO8 — General purpose digital input/output pin.

U0_RXD — Receiver input for USART0.

PA_0

L12

126

[2]

R — Function reserved.

I2S1_RX_MCLK — I2S1 receive master clock.

CGU_OUT1 — CGU spare clock output 1.

R — Function reserved.

PA_1

J14

134

[3]

I/O GPIO4[8] — General purpose digital input/output pin.

QEI_IDX — Quadrature Encoder Interface INDEX input.

R — Function reserved.

U2_TXD — Transmitter output for USART2.

R — Function reserved.

Table 3.

Pin description …continued

Pin name

Description

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