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PM5342 Datasheet(PDF) 60 Page - PMC-Sierra, Inc |
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PM5342 Datasheet(HTML) 60 Page - PMC-Sierra, Inc |
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60 / 558 page ![]() PM5342 SPECTRA-155 DATA SHEET PMC-970133 ISSUE 4 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 38 Pin Name Pin Type PIN No. Function RLD Output R20 The receive line DCC (RLD) signal contains the line data communications channel (D4 - D12) extracted from the incoming stream. RLD is updated on the falling edge of RLDCLK. ROHCLK Tristate Output P19 The receive overhead clock (ROHCLK) can be selected to clock out either the section orderwire (E1), the line orderwire (E2), the line user channel (F1) or the automatic protection switch channel (K1, K2). Selection of the receive overhead clock is made using the ROHSEL bits in the SPECTRA-155 Receive Overhead Output Control register. When either orderwire or user channel clocks are selected, ROHCLK is a 64 KHz clock used to update the ROH output. If selected using the R64SEL bit in the SPECTRA-155 Receive Overhead Output Control register, ROHCLK is generated by gapping a 72 KHz clock; otherwise, ROHCLK is not gapped. When the receive automatic protection switch channel clock is selected, ROHCLK is a 128 KHz clock used to update the ROH output. ROHCLK is generated by gapping a 144 KHz clock. ROHCLK can be tristate using the TRIS_OHB input and the ROH_TS bit in the SPECTRA-155 Receive Overhead Output Control register. On reset, ROHCLK will be tristate if TRIS_OHB is low. |
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