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PM5366-PI Datasheet(PDF) 189 Page - PMC-Sierra, Inc

Part # PM5366-PI
Description  HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
PDF  267 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5366-PI Datasheet(HTML) 189 Page - PMC-Sierra, Inc

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PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
177
2,2
8,36,64
23,107,191
•••
1,28
34,62,90
100,184,268
2,28
34,62,90
101,185,269
3,28
34,62,90
102,186,270
Table 22
- E1/TVT2 Tributary Column Numbering
E1#
SPE1 Column SPE2 Column SPE3 Column
SBI Column
1,1
7,28,49,70
19,82,145,208
2,1
7,28,49,70
20,83,146,209
3,1
7,28,49,70
21,84,147,210
1,2
8,29,50,71
22,85,148,211
2,2
8,29,50,71
23,86,149,212
•••
1,21
27,48,69,90
79,142,205,268
2,21
27,48,69,90
80,143,206,269
3,21
27,48,69,90
81,144,207,270
SBI Timing Master Modes
The TEMAP-84 supports both synchronous and asynchronous SBI timing
modes. Synchronous modes apply only to T1 and E1 tributaries and are used
with ingress elastic stores to rate adapt the receive tributaries to the fixed SBI
data rate. Asynchronous modes allow T1, E1, DS3 and transparent tributaries to
float within the SBI structure to accommodate differences in timing.
In synchronous SBI mode, the T1 DS0s and E1 timeslots are in a fixed format
and do not move relative to the SBI structure. The SBI frame pulse, SAC1FP or
SDC1FP, in synchronous mode can be enabled to indicate CAS signaling multi-
frame alignment by pulsing once every 12
th 2KHz frame pulse period. SREFCLK
sets the ingress rate from the receive elastic store.
In Asynchronous modes, timing is communicated across the Scaleable
Bandwidth Interconnect by floating data structures within the SBI. Payload
indicator signals in the SBI control the position of the floating data structure and
therefore the timing. When sources are running faster than the SBI the floating
payload structure is advanced by an octet by passing an extra octet in the V3
octet locations (H3 octet for DS3 and E3 mappings). When the source is slower
than the SBI the floating payload is retarded by leaving the octet after the V3 or
H3 octet unused. Both these rate adjustments are indicated by the SBI control
signals.



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