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PM5366-PI Datasheet(PDF) 222 Page - PMC-Sierra, Inc |
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PM5366-PI Datasheet(HTML) 222 Page - PMC-Sierra, Inc |
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222 / 267 page ![]() PRELIMINARY PM5366 TEMAP-84 DATASHEET PMC-2010672 ISSUE 1 HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER PROPRIETARY AND CONFIDENTIAL 210 Figure 46 - Framer Mode G.751 E3 Transmit Input Stream With TGAPCLK TGAPCLK[x] TDATI[x] bit 1536 bit 1531 bit 1529 bit 1530 bit 1532 bit 1533 bit 1534 bit 1535 bit14 TICLK[x] bit13 The Framer Mode G.751 E3 Transmit Input Stream diagrams (Figure 45 and Figure 46) show the expected format of the inputs TDATI, TFPI/TMFPI, and TICLK and the output TFPO/TMFPO (and TGAPCLK) when the TEMAP-84 is configured for the E3 G.751 transmit format. TFPI or TMFPI pulses high for one TICLK cycle and is aligned to the first bit of the frame alignment signal in the G.751 E3 input data stream on TDATI. TFPO or TMFPO will pulse high for one out of every 1536 TICLK cycles, providing upstream equipment with a reference frame pulse. The alignment of TFPO or TMFPO is arbitrary. There is no set relationship between TFPO/TMFPO and TFPI/TMFPI. The TGAPCLK output is available in place of TFPO/TMFPO when the TXGAPEN bit in the DS3 and E3 Master Unchannelized Interface Options register is set to logic 1, as in Figure 46. TGAPCLK remains high during the overhead bit positions. TDATI is sampled on the falling edge of TGAPCLK. Figure 47 - Framer Mode G.751 E3 Receive Output Stream RDATO[x] bit 1536 0 RFPO/RMFPO[x] Nat RAI 1 1 1 1 0 100 bit 1531 bit 1529 bit 1530 bit 1532 bit 1533 bit 1534 bit 1535 ROVRHD[x] 0 bit13 RSCLK[x] Figure 48 - Framer Mode G.751 E3 Receive Output Stream with RGAPCLK RGAPCLK[x] RDATO[x] bit 1536 bit 1531 bit 1529 bit 1530 bit 1532 bit 1533 bit 1534 bit 1535 bit13 The Framer Mode G.751 E3 Receive Output Stream diagrams (Figure 47 and Figure 48) show the format of the outputs RDATO, RFPO/RMFPO, RSCLK (and RGAPCLK), and ROVRHD when the TEMAP-84 is configured for the E3 G.751 receive format. RFPO or RMFPO pulses high for one RSCLK cycle and is |
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