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PM5366-PI Datasheet(PDF) 227 Page - PMC-Sierra, Inc

Part # PM5366-PI
Description  HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
PDF  267 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5366-PI Datasheet(HTML) 227 Page - PMC-Sierra, Inc

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PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
215
Figure 55
- Telecom DROP Bus Timing - AU4 VC
LREFCLK
••••
LDPL
LDC1J1
LDDATA [7:0]
A1 A2 A2 A2 C1 X X
V5 byte TUG3 #1
National bytes
V5
J1
V1 V1 V1
V1 byte TU #1,
TUG2#1, TUG3 #1
NP NP NP
First NPI byte TUG3 #1
J1 byte VC4
Z7
Z7 byte TUG3 #1
LDT PL
INVALID
LDV5
INVALID
The LDV5 and LDTPL signals are optional when using the ingress VTPP within
the TEMAP-84 which will regenerate the LDV5 and LDTPL signals from
LDC1J1V1, LDPL and the pointers within LDDATA[7:0]. In order to bypass the
ingress VTPP, the position of the single J1 byte and the VC4 is implicitly defined
by the C1 byte position. In the locked AU4 mode, the VC4 is defined to be
aligned to the AU4 transport envelope such that the J1 byte occupies the first
available payload byte after the C1 byte, and no pointer justifications are
possible.
13.4 Telecom ADD Bus Interface Timing
Figure 56 shows the function of the telecom ADD bus signals in AU3 mode.
Data on LADATA[7:0] is updated on the rising edge of LREFCLK. The LAC1
input is sampled on the rising edge of LREFCLK and aligns all devices on the
ADD bus by marking the first C1 byte of the first STS-1 in every fourth STS-3
transport envelope. LAC1 pulses every fourth STS-3 to indicate tributary
multiframe alignment on the ADD bus. The bytes forming the three STS-1
synchronous payload envelopes are identified when the LAPL signal is high. The
LAC1J1V1 signal pulses high, while LAPL is set low, to mark the C1 byte of the
first STS-1 in every frame of the STS-3 transport envelope. The LAC1J1V1
signal is high when the LAPL signal is high to mark every J1 byte of each of the
three STS-1 SPEs. The three STS-1 SPEs have an alignment determined by the
SONET/SDH Transmit Pointer Configuration registers. A pointer of 522 decimal
is illustrated in Figure 56.



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