PM5366-PI datasheet(229/267 Pages) PMC

229 / 267 page

PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

217

Figure 57

- Telecom ADD Bus Timing - Locked AU4 VC Case

LREFCLK

••••

LAC1

LAOE

LAPL

LAC1J1V1

Implicit location

of VC4 J1 byte

LADATA[7:0]

A2C1 X X

National

bytes

First R column of TUG3 #1

V1 byte TU #1, TUG2 #1, TUG3 #1

Last H4 byte

in tributary

multiframe

V5 byte TU #1,

TUG2 #1, TUG3 #1

Fixed

Stuff

Columns

RR RRR R

R RRR RR

Z6 byte TU #1,

TUG2 #1, TUG3 #3

13.4.1 Notes on 77.76 MHz Telecom Bus Operation

Telecom bus operation at 77.76MHz is simply a byte interleaved multiplex of a

19.44 MByte/s stream with idle cycles. The STM-1 of interest is identified by the

LSTM[1:0] bits of the Master Bus Configuration register. On the Drop bus, the

three unused STM-1s are simply ignored, including parity. On the Add bus, the

unused STM-1s are high-impedance by default, but the bus may be configured

to drive continuously. The following is of special note:

1. Regardless of the state of the LSTM[1:0] bits, the LAC1 input pulse

always identifies the first of the twelve C1 bytes.

2. The LAC1J1V1 output is only valid if the LSTM[1:0] bit are “00”. The C1

indication will identify the first of the twelve C1 bytes. The J1 will be high

during either the first J1 byte or the first three J1 bytes depending on

whether AU3 or AU4 mode is programmed. The same is true of the V1

pulse. If more than one device is driving the bus, all devices must use the

same transmit payload pointer.

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